I am trying to use the UART module to decode the SBUS signal from an RC receiver. This signal is 100KBps Even parity and 2 stop bits. It is also an inverted signal so I added a not gate on the RX input. Since I could not select 100kbuad in the uart config, I am using my own 800Khz clock.
The device does not seem to decode this signal properly. In the attached image, the top trace changes state whenever I get an interrupt for a new character. The second trace is the signal from my receiver. To see that the uart was getting a signal, I tied the input to it to another output on the psoc and that is the third trace. The last trace is just the 800Khz clock.
You will notice that the first trace changes state after the first stop bit, not the second. I am not sure if this is a symptom iof the issue or not. I get an interrupt after the first stop bt every time so it seems like the uart is locking on to the signal fine.
The first byte has the value of 0x0F. This gets decoded correctly, however, all other bytes are not correct. The second byte shown should be 0x00 but its decoded as 0xbf. The next byte is 0x37 but is decoded as 0x13.
Is there an know issues using 8E2 format?