Can you share with us the schematic of the board
GPIOs retain their state in Low Power. It is recommended that you change the drive modes of possible GPIOs to Analog Hi-Z before hibernate. Also, please change the Debug Select from SWD to GPIO for further reducing the low power current.
Thanks! Just to follow up, we found a couple issues:
- a cold solder joint was causing a GPIO to float intermittently
- a pair of I2C pins were pulled up to a 3.3v supply provided by one of the PSoC DACs. The sleep state of that DAC was stable at room temperature for most boards, but started floating consistently at lower temperatures. Setting those pins to ALG_HIZ before hibernate solved the problem.
tldr, current leakage through digital input buffers on floating pins
Curious, what exactly is the mechanism for current leakage through floating input pins? I found a page on the TI wiki that suggests high and low side FETs can turn on simultaneously - is that what's happening here?