The actual conversion speed (and thefore the conversion rate) of the ADCs depends on the clock they are driven with. So to really get the 100ksps you want the ADCs should convert faster than that. You SOC signal derived from the 100kHz clock is just signalling _when_ the conversion should start. E.g. the SAR ADC with 12 bits converts at 111ksps with a 2MHz clock, but the DelSig ADC in 8bit mode converts at 74ksps with a 6MHz clock.
Yes, you want single sample mode. All other modes are free-running and take one sample after each other. Note that the DelSig ADC can handle only up to 75ksps in that mode. Continuous mode is faster, but won't stop and wait for SOC.
Check examples posted in this thread, which has both ADC_SAR, DelSig_ADC and sample-and-hold demos http://www.cypress.com/comment/381696#comment-381696 PS. What is the reason you try to avoid using sample-and-hold component?1 of 1 people found this helpful
Thank you both for your responses!
I'm trying to use three separate ADCs because:
1. Speed - if I use one ADC and a sample/hold, then I have to wait for three sequential ADC conversions. I'm trying to run three "parallel" ADCs to speed the process up (this gives me more time between ADC samplings to do number crunching/processing).
2. Learning/didactic example: I'm trying to use both the SAR and DelSig ADCs to better understand them, and their differences.
1 of 1 people found this helpful
The SAR ADC can run with 1Msps, and for scanning 3 channels you only need 300ksps, so its more than fast enough. Using the Sequencing SAR ADC also frees you from handling the channels, you just get notified when all channels are converted and can read the values.