8 Replies Latest reply on Feb 28, 2017 10:16 AM by cblinney_2276156

    SPI Master Timing Question


      First off, I would like to say I am new here and my apologies if I am posting this in the wrong place.

      So quick back story, I bought 2 CY8CKIT-049-42xx PSoC 4 Prototyping Kits and they just arrived in the mail.  I have never used PSoC or any Cypress offerings before.  So far I have built my own project and got the LED on board to blink however fast I want and with whatever duty cycle I choose to get familiarized with the PSoC Creator 3.1.  (So far I love it, it took me 30 mins of just reading the kit guide to get started from start to finish of my own project.  Very well documented, anyone with some C experience can probably teach themselves this.  Excellent, 11/10, would recommend)

      After that I tried to get my wireless PS2 Controllers running on this (I have already run them on the MSP430 from TI).  I love the SPI Master block so far, being able to set it to LSB First is great since the PS2 controller is little endian.  However the problems start to occur when I upload the code.  I grab a scope and check my Clk line, working great, so is Attention (SS/CS) and Command (MOSI).  However my Data line (MISO) is floating at about 4v.  The data being sent to the PS2 controller is correct on the scope, and its being run just in digital mode currently, so I am sending 5 bytes to it (0x01, 0x42, 0x00, 0xFF, 0xFF) and it should be returning (0xFF, 0x41, 0x5A) for the first 3 bytes (which I normally check but am not currently so that the transfer isn't interupted so I could check the data being sent) and then button data for the last 2 bytes.


      I have tried slowing the clock I have attached to the SPI Master block as I know these PS2 controllers are somewhat finicky with timing.  Some places say they will run a bit below 100kHz all the way to a bit above 500kHz.  The ones I have from using the MSP430 seem to like to run between 350kHz and 500kHz and I have the external clock set to 850kHz so the Clk they get should be 475kHz, which it seems to be.  But I also know these controllers seem to like a small delay between bytes, and there is absolutely none.  Is there a way to code in a delay between each byte using the SPI Master?


      I am using this link for reference;




      Or if you have any other ideas, please let me know as well!  As easy as this seems and as quickly as I have taken to it, I am sure there is tons to learn still.


      Code I am using to get it to send the data correctly so far is as follows; SPI Master setup with CPHA and CPOL both = 1.  RX and TX buffers both set to 5.  Data bits set to 8.


      #include <project.h>


      int i;


      char button_Data[21];


      char poll_Data[] = {0x01,0x42,0x00,0xFF,0xFF};
      char check_Digital[] = {0xFF,0x41,0x5A};


      int main()
                  button_Data[i] = SPIM_ReadRxData();   
          /* CyGlobalIntEnable; */ /* Uncomment this line to enable global interrupts. */
          return 0;
      /* [] END OF FILE */

        • 1. Re: SPI Master Timing Question

          Welcome to the forum!


          At first some globals regarding PSoCs: Creator 3 is a bit outdated, actual is 4.0 SP1 which you can download from the Cypress website.


          The Cy8CKIT-049-4xxx is a very cheap board. When you can spend the money I would suggest you to get hands on a CY8CKIT-043. the main advantage (beside a larger chip) is the ability to debug your code using breakpoints and inspecting variables.


          Your program:


          SPI_Stop() should be called only once during program initialization, this will power up the internal component. When done, you can send your data. Do not byte-split the data, write all data at once as a complete transaction. This will ensure that the ss-line does not show glitches. Do not wait for a specified time, better wait until the transmission or reception finished, there are APIs for that.


          Please do not post code snippets,  better is to post your complete project, so that we all can have a look at all of your settings. To do so, use
          Creator->File->Create Workspace Bundle (minimal)
          and attach the resulting file.




          Happy coding



          • 2. Re: SPI Master Timing Question

            Much difference between CY8CKIT-059 and CY8CKIT-043?  I can get ahold of the CY8CKIT-059 is more readily available to me.  I went the Cy8CKIT-049 because it was cheap because I don't need to be throwing expensive boards in projects left, right and centre was the thought process.  That was the nice thing with the MSP430 was being able to pull the 20 pin DIP off it and plug it into a socket on a board printed of our PCB mill and the MSP430 DIPs are cheap.  Problem with them was they didn't have enough pins and I have always really like the sounds of Cypress offerings.

            Normally yes, but the problem is it needs to be byte split, that is how these function.  It will not function without a small delay between bytes.  I hear some people complaining about having a delay between bytes, I would love that right now for this application because it is a requirement of the PS2 controller.  Refer to the attached pictures Currently unable to upload pictures (Access Denied), one shows the controller working correctly, with delays between bytes.  Then you can see mine, without delays between bytes and the MISO is floating at 3.6v or so.  The correct way to drive a PS2 controller is with a delay between sets and a small delay between every byte, but without the SS/CS line changing during those delays between bytes.  That is just how it operates.


            EDIT:  Since I can't upload pictures, please take a look at the oscilloscope pictures on the link to the following website, it shows correct operation of the PS2 controller, and you will notice it has delay between bytes without a change in the SS/CS (Attention) line.  This is correct operation.


            Thank you for the tip on the workspace bundle.  Added.

            • 3. Re: SPI Master Timing Question

              I changed your project to reflect the suggestions I made. Had to remove the Bootloadable component due to its dependencies, please re-insert it. I strongly suggest to update to latest creator version and to update your components as well (Creator -> Project -> Update Components)





              • 4. Re: SPI Master Timing Question

                Updated Creator and components.  Thank you for the suggestions and tips.  Tried out your code, would not send data, commented out wait argument and added in SPIM_Enable(); command.  Still does as it did before; attention is pulled low, data is sent, clocked, but no response from the controller.  I am beginning to think this is not a piece of hardware that is compatible using the SPI Master block.  Does the Creator have a TX and RX buffer I can throw bytes at and pull bytes off, to have it communicate nicely without full on bit banging but I can add in short delays between bytes by CyDelayCycles(); between each time it is called?

                EDIT: I did manage to forcibly add delays between bytes using the SPI Master block by only sending it one byte at a time and putting delays between bytes I sent it, however it pulls the Attention line high each time it does this and the controller is unhappy about this,.  It did however begin to show signs of life at that point and began sending 2 bytes back to the microcontroller before erroring and resetting itself and waiting for the loop to begin again.

                • 5. Re: SPI Master Timing Question

                  Try reducing the SPI clock speed. No delays between sending bytes!





                  • 6. Re: SPI Master Timing Question

                    I have tried all sorts of clock speeds.  It does not function without delay between bytes.  Honestly, if you don't believe me, order one, they are only $20, and try it yourself, you will not get a PS2 controller to function without small delays between bytes.  Or a cheap $5 one off eBay from China, it really doesn't matter.


                    I have 4 sitting in front of me, 2 control roomba vacuums currently and are running perfectly fine on MSP430s with a small 5us delay between each byte where the clock stops, and there is no change in the SS/CS line.  That is how they operate.  They REQUIRE delay between bytes.

                    • 7. Re: SPI Master Timing Question

                      Seems you need plan B: use your own ss-line which you drive low at the begin of a transaction and driving high at its end. With this configuration you may put delays between sending bytes. I would suggest to use CyDelayUs() because this function is independent of the selected CPU clock speed.





                      • 8. Re: SPI Master Timing Question

                        Using manual SS/CS line, added 5us delay between bytes and 20us between sets, began working, sending back error codes though.  Increased delay to 15us and 40us between sets and runs perfectly, reading button data correctly now!  Thank you very much for the help Bob Marlowe!  Much appreciated!