I have doubts about the usage of ADC_IsEndConversion(ADC_WAIT_FOR_RESULT) statement. I am expecting that it won't be necessary here. And even though limit detection is specified, it is not enabled in any of the channels in the ADC channel configuration window. I think that is causing the problem. If you do both these corrections, you will get correct result I guess.
Hi Embedd Holmes.
Thank you for the reply. You were partly right. The ADC_IsEndConversion(ADC_WAIT_FOR_RESULT) statement wasnt necessary at all. I read some post i could find around the forum and decided to try and see if it would work. but it had no effect as far as i can tell.
But I did manage to solve the problem. I was supplying voltage to the PSoC 4 through the Vin and GND at the J1 headers. I switched and tried to supply voltage trough P5_VDD and the corresponding GND of this header aswell. This solved the problem.
As far as i know, this new header is responsible for the communication to the PSoC 5 that boots the PSoC 4. Therefore the voltage regulators is connected differently here, than on the Vin/Gnd in header J1 and i get a correct reference value. The problem was that the compare-value was incorrect, which resulted in af faulty measurement.
The program is running smoothly, and is working fine. Thank you again for the suggestion.