You can route the XOR gate output to a pin and can probe and observe whether a pulse of a width (as required in your application) is being produced or not
The issue is with the TopDesign.
#1 StatusReg_D0 is directly connected to the Reset of Timer. Which is high when the signals from the PWMs are active [so Timer is in reset - level triggered]
#2 isr_1 will never get activated since the NOT of StatusReg_D0 is AND'ed with stop_sig. The AND output will always have low signal.
I had modified these in your project and attached with this comment.
minunit.cyprj_.Archive01.zip 2.6 MB