>> You can interface FX3 with a 8-bit parallel camera interface.
>> At the same time do you want to have a slave fifo implemetation ? The GPIF will at only one clk (master or sensor). when you do data transfer in slave fifo, then you cannot collect the data from the sensor as the GPIF data bus is same. So, you will have to implement in your design when to sample into which channel and accordingly the data has to be routed to the USB endpoints. But at a time the GPIF can be configured either of 8 or 16. If you want to change this, then you will have to stop the state machine, load the new configuration and start again.
>> Yes, you can add a UART as well.
>> Please clarify your requirement as block and a logic to read/write the data so that we can suggest more. Practically, I do not think that you may want to use it in such a way to constantly switching between GPIF interface and it is particularly going to be difficult when for the both the modes, you have a different data bus width (8 for one, and 16 for other).
I'm looking at an 8-bit camera interface, but use separate 8-bit bus for the FIFO - so operates in parallel as separate hardware block. We have an FPGA controlling the sensor and feeding the YUY2 data out; but I also need to upload some parameters such as marking bad pixels and calibration data for the sensor. We currently do this over a 230kbaud RS232 interface (which can be slow). I would like to add a separate bus to do this - hence the FIFO.
Also, did think about using SPI as the FPGA has this interface (although we are master at certain times, so will need to change this to a slave as FX3 is master too). I have read that the SPI and UART share the same pins, but i would like to use both interfaces is it possible within the GPIF2 to separate them out?
When GPIF is configured in 16-bit mode, you can use both UART and SPI interfaces. (Refer to Table 7: Pin Description in FX3 datasheet)
So, you can use SPI interface of FX3 for uploading calibration data and other parameters.