4 Replies Latest reply on Feb 6, 2018 3:59 AM by maca_1542896

    How to use FX3 I2S?



      I used FX3 as a usb control device, then modified the firmware to enumerate the device as a UAC device.


      and I want use another DSP board connect to FX3 via I2S.


      there is only 1 line for data transfer(I2S-SD), and the DSP board have 2 line for data in/out(ADCDAT/DACDAT)


      1. how should I connect the two device? 


      2. does the FX3's I2S support dumplex-mode?





        • 1. Re: How to use FX3 I2S?

          FX3 functions as I2S Master as transmitter only. The I2S interface consists of four signals: clock line (I2S_CLK), serial data line (I2S_SD), word select line (I2S_WS), and master system clock (I2S_MCLK).


          We have provided one example firmware in the  SDK: UsbI2sDmaMode:   The device enumerates as a vendor specific USB device with two bulk endpoints   EP1 OUT and EP2 OUT. The data received on EP1 OUT is streamed to I2S left channel and data received on EP2 OUT is streamed to I2S right channel.

          • 2. Re: How to use FX3 I2S?

            Hi Nishant,


            Thanks for your response.


            in the UsbI2sDmaMode sample, can I modify the usb descriptor to change the device as a UAC device?

            • 3. Re: How to use FX3 I2S?

              Yes, you can do so. You can change the descriptor to change the device class as per your requirement.

              • 4. Re: How to use FX3 I2S?



                To follow on from the reply above, I note that UAC does not support the concept of two endpoints for compliant stereo transmission. I am trying to resolve this and any solutions would be appreciated.


                I am trying to route UAC compliant stereo audio from a host to the I2S transmitter on FX3 but I can't see any easy way of making it UAC compliant. I can think of two possible solutions, neither of which is ideal:


                I expose two mono endpoints (so two AC/AS devices) and hope that the host app can address them. As well as being clumsy, this will allow a host to attempt to set different sample rates for each stream, which isn't going to work as they converge on a single I2S port.


                Expose a single endpoint, UAC compliant, and de-interleave the audio on FX3 (in software) and feed two DMA channels to I2S. As I am streaming at 96kHz/24 or 32 bit stereo, I am concerned that this data rate (about half a megabyte a second) will be a challenge for FX3's ARM core. Unfortunately, the DMA controller does not allow interleaving (i.e. a stride of 2). That would have solved the problem but it doesn't appear possible.


                Are there any other options to consider? I'd prefer to avoid having to route the audio out of GPIF into the FPGA if possible (as I'm already using GPIF for the multichannel device-to-host audio) and it'd require a board re-spin.