1 Reply Latest reply on Apr 20, 2017 6:20 AM by user_342122993

    uC with FPGA

    mexcoindia_2401921

      Dear All, my query is a liitel diffrent as follows:

         

      1. Is there any uC from Cypress with on chip FPGA ..?

         

      2. The UDB in PSOC uC has Sum-Of-Products & Macro-cell type architecture,which introduces delay. So, what the solution ?

         

      3. Can we use UDB to implement any circuit which is written in Verilog, tested & simulated using Xillinx  ?

         

      4. can we force the MCU of PSOC uC to direct the instruction as such to the circuit in UDB & CPU of uC will be idle during that period.

         

       thanks

         

       Gulzar Singh

         

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