2 Replies Latest reply on May 3, 2017 3:15 AM by 1065271400_2323246

    state machine

    1065271400_2323246

      hello,everyone,

         

      I changed the "FX3_AD9269_MT_USB3.cydsn" 32 bit data to 16 bit data ,and I changed the limited counter to 8183,and I compile the state machine ,it succeed,and generated a .h file,but when I viewed the timing ,it shows"Invalid state machine path for the simulation for state TH0_RD_LD", why?I attached the file .please help me!

         

      thank you !

        • 1. Re: state machine
          nisa

          The state machine timing does not let the state to move to "TH0_RD_LD" because the transition is based on DMA_RDY_TH0 getting asserted, which does not get asserted again by itself. You can check this by creating the scenario till state 7 (dont loop to the next state). This is because the designer doesn't see the DMA_RDY signals getting asserted again, but on real scenario it will (based on whether the host is asking the data). So, if you test on the hardware, you will see the state machine will move to "TH0_RD_LD" once the buffer of thread 0 becomes available again.

          • 2. Re: state machine
            1065271400_2323246

            hello,Nishant,

               

                     I understand what you said,you mean the simulation is not right,but if I test on the FX3 it can work,am I right?I just want to transfer data by it.Thank you !

               

            Alex