Please post your code so we can check it.
I am using the same code as yours, I tried the code you sent but i get the same results.
I need to connect externally between VREF (pin 45) to P3 (which you define as Vref). I thought it will be inside PSOC.
I am using PSOC 4, CY8C4247LQI_BL483 from EVB and CY8C4248LQI_BL483 on my board.
Is it related to the chip version?
Should connect to pin 45 not pin P1 pin 7 also you only need one Cap not Two. Please post your code so we can check the design.
One other thing one of the Battery Levels is a Battery Simulation the other one is the real battery level.
I didn't send my code because it is the same as you sent, i have downloaded this example already. I only changed VREG from P3 to P1, there i have 1u capacitor in my HW.
I also tried again with the code you sent on the EVB.
I thought i will not need to short externally between VREF and ADC input.
How did you change VREF pin. For PSoC 4 BLE there is a dedicated VREF pin, unlike PSoC 4 Pioneer kit where pin p1 is used.
I am using CY8C4248LQI_BL483 chip on my PCB and CY8C4247LQI_BL483 on Pioneer kit.
I am using the following code on both units and got the same results, wrong reading without external connection of VREF to P1.
I recently find in Cypress documentation "BLE_battery_level" document asking to connect external short between p3 to VREF.
So what is the right way? with or without external connection ?
External connection is necessary. The kit has dedicated VREF pin, which comes from Vref component an integral part of the ADC. There is no way to route that to ADC internally and the whole battery voltage measurement is based on this voltage. So external connection is necessary in measurement.