1 Reply Latest reply on May 11, 2017 1:47 AM by hima

    UART to I2S Audio Streaming App

    cypress_1675071

      The application is streaming audio from a PC across UART and having PSoC4 buffer it... and simultaneously send this stream to it's I2S output peripheral.

         

      I am interested in having a host PC send blocks of 220 bytes into a receiving PSoC4 UART @ 500Kbps every 10ms. This means there is a time gap between the bursts of 220 bytes.

         

      Then this buffer is output to I2S @ 384Kbps.

         

      I assume DMA is the best, but I tried to set the Rx buffer size of the UART to 220 and it will not allow DMA support with this buffer size. However, the 'Number of data elements to transfer' of the DMA component can be set to 220. Should they match each other?

         

      There is no 'Buffer size' setting requirement for the I2S. I simply set it's connected DMA data elements size to 220 and point to a static buffer with 220 elements. Why is a 'Rx Buffer Size' needed for the UART?.. and why can it's largest size only be 16?

         

      Can this streaming data "bit rate modification" application be implemented totally in PSoC4 hardware, or is firmware required to alter the buffer address pointers for the UART, I2S and DMA blocks? If firmware is required, do I need to use 2 descriptors in the UART DMA block and 2 descriptors in the I2S DMA block... and cross ref their pointers in their interrupt routines?

         

      Can a single DMA block be used with the UART connected as input and I2S connected as output?

         

      Are there any examples of this scheme? I can only find a UART to/from memory 'terminal echo' example.

        • 1. Re: UART to I2S Audio Streaming App
          hima

          Hello,

             

          I assume that you need to transfer data from UART to SRAM buffer. In this case you need not give a a bigger number in buffer. You can give 8bytes(SCB) or 4bytes(UDB) and transfer data based on the RX-FIFO On byte received and perform DMA operation with level trigger.No need to increment source address, increment destination address.

             

          In case of transferring the data to I2S you need to use another DMA channel.Similar to above arrangement you need to transfer data 8 byte at a time. However we are not sure that this implementation would work with all datarate. Better to have a circular buffer similar to the USB-Audio example project.

             

          We do not have an example project for this.

             

          Thanks,

             

          Hima