1 Reply Latest reply on May 7, 2017 8:33 AM by forqzy_1626536

    SCB SPI master operation

    forqzy_1626536

      Hi, 

         

      I am facing a problem when using PSOC4 as a SPI master.

         

      The SPI slave is a chip, and the operation defined by the chip is the following.

         

      The SPI mode is 0,0

         

      #1. NSS = 0

         

      #2. Master MOSI write the address byte . e.g 0x01

         

      #3. Master MISO read the data byte generated by the slave.

         

      #3. NSS = 1

         

      The following code is used in this operation.

         


      ////////////////////////////////////////////////////////////////////////    
          uint8 mTxBuffer[1] = {addr};

         

          SPIM_SpiUartPutArray(mTxBuffer, 1);

         

          while(2!=SPIM_SpiUartGetRxBufferSize())
          {
          }
          SPIM_SpiUartClearTxBuffer();
          

         

          while(SPIM_SpiUartGetRxBufferSize()>0){
             Value = SPIM_SpiUartReadRxData();
          }
          SPIM_SpiUartClearRxBuffer();

         

      /////////////////////////////////////////////////////////

         

       

         

      But always found the NSS will be set to 1 after the write is executed.

         

      Then it is not possible to read the byte return from the slave.

         

      Any suggestion on this? Or have to using the GPIO to simulator this feature?