The input of the SAR ADC is from analog components through the analog routing or from GPIO.
The UDB output cannot be connected as analog input. In SAR1_CR1, swvp_src mentions the control source of the SAR through the ANAIF SAR routing control register or through the UDB. This control sources are SOC, sampling clock or SAR Mux selection signal but not the analog input for the SAR block. I am sorry that the complete information is not given in documentation.
To connect SAR negative input to VSSA, kindly use the SAR0_SW3 for SAR0 block. The more information about the register is provided in the below link, page no 676: http://www.cypress.com/file/136211/download
Let me know if this helps.
No, Ramesh, I'm afraid it does not help at all. You just copied your answer from the support case and, as I already told you there, it is not an answer to my question. So here is my copy-paste:
I have never wanted, let alone asked, about connecting the UDB output as an analog input. The result of such a measurement would obviously be meaningless. I want to control ADC input selection using UDB. Have a look at the PSOC5LP TRM, page 398. Input selection, 38.2.1:
The input selection, both positive and negative, is made through the input selection mux, which can be controlled through either the SAR routing registers in the analog interface or through the UDB. Setting the SARx_CSR bit takes the positive input through UDB and clearing the bit takes the positive input through registers. Similarly, setting the SARx_CSR bit takes the negative input through UDB and clearing the bit takes the negative input through registers.
So, as you can see, the UDB can control the input MUX somehow, at least according to the manual. I presume the vp_ctl_udb and vn_ctl_udb buses of the primitive component are then carrying the MUX selector values. The problem is that these values are not documented and this case is all about that. Please provide me with the encodings, I don't want to guess them blindly.
vn_ctl_udb = 4'b0000 means?
vn_ctl_udb = 4'b0001 means?
vp_ctl_udb = 4'b0000 means? etc.
What you describe later in your text it how to configure inputs via the ANAIF registers. This is well documented, but this is not my case.