Are you talking about feeding the clock input on the PWM component? At the end of the PWM Datasheet is the AC specifications, if i remember correctly (i have not the datasheet at hand) the max. clock frequency at the clock input of the PWM component is around 64MHz, you can put more but the behavior is not stable.
If you are talking about the max. frequency the PWM component can generate is ~24MHz (limited by the max frequency the GPIOs can handle).
Hope it helps, check the PWM datasheet at the end is the table with some information not available on the first pages.
Thanks for the quick response. I didn't know that the GPIOs were limited to 24MHz
Anyway I dont really want the output to change as fast as 24MHz. It's just the clock speed I was talking about.
I have set my PLL frequency to 64MHz and I am using a 78MHz clock for the PWM.
It compiles correctly without errors. Why am I not getting an error when the clock frequency of the PWM is greater than the PLL frequency?