You'll need to read the inputs to decide which pins have changed from high to low.
Think about de-bouncing the switches.
It is one way of doing it, but if input bounces back quickly to high I may get a false reading plus no way to distinguish between simultaneous transitions on multiple inputs...
I was hoping for a readable mechanism that holds a record of interrupt source. AN86439 has an example on page 50 using Interrupt Status Register and I see a declaration in generated API:
/* Interrupt configuration Registers */
#define SW_INTCFG (* (reg32 *) SW__INTCFG)
#define SW_INTSTAT (* (reg32 *) SW__INTSTAT)
or GPIO_PRTX_INTR as described in TRM.
but not sure if it is functional in entry level PSOC 4000. I wish Cypress provided an accurate "cheat-sheet" per each chip variation describing implementation limitations vs TRM baseline.
Just to confirm that reading and masking INSTAT (aka GPIO_PRTx_INTR) works perfectly on PSOC 4000