I'm pretty sure that the duty cycle can go up to 100%. This suggest that something in your project is wrong. maybe post it? (And explain how you measure the duty cycle)
Welcome in the forum, Scott.
Have a look into the PWM's datasheet, DC specs say max frequency is 50MHz.
Thanks, that was it. Actually, I'm using 16-bit, one output, so that makes the max frequency 43MHz per the data sheet.
Interestingly though, I'm out of clocks, having used the UART, SPI, all 3 ADC's, couple of counters. So, I tried to manually clock the two SAR's, so they'll free the slot I needed for the new 43MHz clock. When I do that, the closest I can get to 18MHz is 16MHz for the SAR's, and the 43MHz says it's 63MHz still. I've just got too much going on in here?
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Each clock is derived by IMO and the PLL and a division by an integer number. So when you set PLL frequency to 80MHz you can get as close as 40MHz by a division by 2. Or you set the PLL directly to 42MHz.