I can see two reasons causing the issue:
The reset signal is synchronous in nature, thus needing a clock low to high transition while it is asserted. The code you use to reset with a control register will execute much too fast. Fortunately you do not need reset. You can write in your interrupt handler the starting value into the timer when it is stopped.
For the capture signal applies the same. I would suggest to use a "Pulse Converter" component which will ensure the required length of the capture input. Syncing the comparator output can be done by the component itself: configure sync and provide a clock to sync to.
Appreciate your feedback. Those are helpful tips.
I figured out a few things i was neglecting.
1. I overlooked that the PWM was right aligned so my oscilloscope measurement neglected the first half of the first PWM period
2. Using the slower clock for the PWM created a delay that i wasn't accounting for
3. I used the 1 MHz clock for the PWM to remove delay from #2. Things were better but then realized that I needed to reset the PWM counter value each time to get consistent results.
Does that all make sense? Things appear to be working to my satisfaction at this point.
When something works as expected it proves that you are right ;-)