I2C pins should be configured for "Open Drain dives low" and an external pull up resistor connected to your required voltage. This will cover your required LVTTL level. I2C components in creator with buried pins will set the drive mode automatically.
Hello Bob, thank you for your response.
I think I must explain my problem in more detail.
I have the PRoC (I2C master) running on 4.2 volts and an I2C slave on 2.5 volts.
(There are variations on the power lines, however, I would like to keep the question simple.)
The communication lines are pulled up to 2.5 volts, since 4.2 volts may damage the I2C slave.
According to the PRoC I2C component datasheet, the pins are configured to be "Open Drain Drives Low" with a threshold of "CMOS".
The problem is that in order for I2C master to read logic high, the line must be above 2.94 volts (=4.2 volts * 0.7) which cannot be achieved with the communication lines only pulled up to 2.5 volts.
I am aware of hardware solutions to this problem but I would like to check whether a software solution is possible before changing my design.
In PSoC Creator, digital input pins are configurable to have "LVTTL" threshold.
If this is possible for I2C pins, I would be able to communicate with the I2C slave in the current configuration since the threshold value for input high for LVTTL is only 2 volts.
So I am wondering whether there exists any APIs that can change the threshold of the I2C pins from "CMOS" to "LVTTL".
Thank you again.
The I2C components have that built into the configuration afaik, so modifying that might be possible with building your own component with the same settings, but the pin thresholds changed.