SPI Glitch when going to deepsleep

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Anonymous
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Hey i'm on the CYBLE-224110-00 with SPI pins set to

   

MISO = P2.1

   

MOSI = P3.1

   

SCLK = P3.4

   

SS_BLK = P3.5

   

And I attach a pic of my pin cofiguration of SS_BLK and SCLK.

   

So what happens is that I put the device to deepsleep and I see a ~180 uSec glitch (starts at Vdd, down to Vss, back to Vdd) whenever I wake up from a timer wake up interrupt. I see this glitch on P3.4 and P3.5 but not P2.1 or P3.1. I don't know if the glitch is occurring on other pins, I have not sampled the other pins yet. ( I tried to manually write(1) to the SS_BLK and SCLK pins right before I sleep but it didn't help solve the glitch. 

   

Anyone have an idea what the hell I'm seeing?

   

I have a work around right now by putting the device to sleep instead of deepsleep. This seems to solve the glitch I'm seeing.

   

Sleep code:

   

SPI_ACCX_Sleep();
        UART_DEB_Sleep(); 

   

CySysPmDeepSleep();
        SPI_ACCX_Wakeup();
        UART_DEB_Wakeup();

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1 Solution
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

Welcome in the forum.

   

This is exactly what the _Sleep() APIs were made for. Because in deep sleep the HF clocks get removed the peripherals should be stopped and status saved before entering power saving modes.

   

 

   

Bob

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1 Reply
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

Welcome in the forum.

   

This is exactly what the _Sleep() APIs were made for. Because in deep sleep the HF clocks get removed the peripherals should be stopped and status saved before entering power saving modes.

   

 

   

Bob

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