7 Replies Latest reply on Aug 30, 2017 12:54 AM by anks

    Control Register (logical) error in PSoC 5

    prithvir.prakash_2279271

      Hi,

         

      I use the PSoC 5LP CY8C5868AZI-LP035 to generate a 3 phase sine wave with 3 external DACs with an SPI interface. So, as suggested in the documentation, I have a firmware controlled setup where i enable each DAC when required. 

         

      I use a 3bit Control register and the problem is that i am not able to activate each line in sequence, ie, CR_Output1, followed by CR_output2, ending with CR_Output3. I can do so, however, when i give a certain delay between their enabling, but when i do so without any delay, the 3rd output selects when im actually selecting the 2nd output and vice versa. 

         

      So, to enable them, the input to the API is,

         

      0x06, 0x05 and 0x03, this should lead to Line1, Line2 and then Line3, but what happens is: Line1, Line3, Line2.

         

      So i have to exchnge the input as: 0x06, 0x03 and 0x05, which somehow works, and i dont know why.

         

      Any help would be appreicated.

         

      Thanks in advance.

         

      PRP