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Hello,
Regarding SWD debugging, I have a question about pin configuration.
I found below when I read "CYW920706WCDEVAL Evaluation Kit Hardware User Guide"
The HCI UART interface may be used for SWD debugging. When used for debugging, the normal HCI UART function may not be used. The device FW will auto-detect the presence of an SWD debugger if the SWDIO signal is connected to HCI UART pin BT_UART_RXD and the SWDCLK signal is connected to BT_UART_TXD.
However, I can check two pins for SWD is defined in make file(CYW920706WCDEVAL.mk) as following,
CY_CORE_DEFINES+=-DSWD_CLK=SWDCK_ON_P11
CY_CORE_DEFINES+=-DSWD_IO=SWDIO_ON_P15
So, I'm confusing which pin config is correct for SWD?
1. BT_UART_RXD and BT_UART_TXD using HCI UART
OR
2. P11 and P15 using GPIO
Could you please let me know that?
Solved! Go to Solution.
- Labels:
-
ispn:38625:1:0
-
l1:314:1:0
-
Wireless
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Please use option 2 for SW debugging.
Check the readme file here- https://github.com/cypresssemiconductorco/mtb-example-btsdk-hal-pwm
Readme file of every code example has following note:
- CYW920706WCDEVAL: SWD debugging requires fly-wire connections. The default setup uses P15 (J22 pin 3) for SWDIO and P30 (J19 pin 2) for SWDCK. P30 is shared with BTN1.
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Please use option 2 for SW debugging.
Check the readme file here- https://github.com/cypresssemiconductorco/mtb-example-btsdk-hal-pwm
Readme file of every code example has following note:
- CYW920706WCDEVAL: SWD debugging requires fly-wire connections. The default setup uses P15 (J22 pin 3) for SWDIO and P30 (J19 pin 2) for SWDCK. P30 is shared with BTN1.