How to enable CYW20706 pcm short cycle frame sync?

[huihuang2009]

Hi,

Now I am using CYW20706A2 to do some eSCO related task.  In my case, 20706 will act as HFP AG and audio data will be exchanged in eSCO.

Our Codec is a little special, it likes short cycle frame sync.  As I measured, current Wiced stack using long cycle frame sync. I found that some functions in HAL can change settings. 

But as I know, stack itself will change PCM settings itself. So just want to know what is the correct way to change PCM settings in application without conflict with WICED bt stack. Can I just change setting by HAL apis at boot up phase? Or I must monitor some event and change PCM settings in event handler? Or I need to change some config file or code to let stack change PCM setting as I need?

Thanks,

Hui Huang

[SheetalJ · Accepted solution]

Hi @huihuang2009 ,

Have you checked- https://community.cypress.com/t5/Knowledge-Base-Articles/PCM-I2S-Clock-Setting-in-CYW20706-for-Audio...?

[huihuang2009]

Hi, @SheetalJ ,

Thanks for your reply. Yes, I checked the link you posted.  The link discussed about clock settings of 20706, and the basic conclusion is that the clock is controlled by firmware and can't be changed by application.

However, my question is about other PCM setting. The WICED SDK has some APIs can control them. I just want to know how to use then to avolid collision with SDK library itself.

Regards,

Chen Yang