Wi-Fi Combo Forum Discussions

Idea is to create UT environment in Linux machine and there we can also plugin the code coverage tool etc. which is otherwise not possible in the target (ARM based). Please suggest your view on this ?

Hi all,

I would like to get sensor data from EDAMP-2BA101.

https://www.elecs.co.jp/microprism/series/edamp-2ba101/

Dose anyone have any idea how to create/add BLE profile for get sensor data from EDAMP-2BA101 ?

I did find (wirced_sense/ hello_clinet) application.

Could you please provide me the related information for how to create BLE profile ?

Many thanks.

Caspar

Hello Everyone,

I'm evaluating the Arrow Quicksilver evaluation kit (based on Murata 1GC module which is based on CYW43907) and I want to build the OTA2-example that is included in WICED Studio (6.1.2 in my case) to test the OTA update capability.

I've built with success the snip.ota2_extract using this command :

snip.ota2_extract-Quicksilver_EVL

But when I build the snip.ota2_example, I get an error. I use this command to build it :

snip.ota2_example-Quicksilver_EVL ota2_image download run

Here the console output :

Downloading DCT ... build/snip.ota2_example-Quicksilver_EVL/DCT.bin @ SFLASH_DCT_LOC=0x0020d000

./tools/common/Win32/mk_wicedfs32 build/snip.ota2_example-Quicksilver_EVL/filesystem.bin build/snip.ota2_example-Quicksilver_EVL/resources/Staging/

Creating Filesystem Done

Illegal division by zero at ./tools/text_to_c/sector_count.pl line 49.

Finished Building OTA2 Failsafe

Building apps lookup table

tools/makefiles/wiced_apps.mk:454: *** OTA2 Factory Reset Image Info File Not built!.  Stop.

make.exe[1]: *** Waiting for unfinished jobs....

make: *** [main_app] Error 2

Makefile:351: recipe for target 'main_app' failed

What I've understood so far, it's when I run this command: "snip.ota2_example-Quicksilver_EVL ota2_image" (without the download and run) I was getting an overlapping error :

     OTA2 component OTA_APP_FILE overlaps FILESYSTEM_FILE by 0x7000 bytes Adjust platform's "ota2_image_defines.mk file" !!

          start: 0x00225000 padded size: 0x00047000  end: 0x0026c000 :: OTA_APP_FILE (build\snip.ota2_extract-Quicksilver_EVL\binary\snip.ota2_extract-Quicksilver_EVL.stripped.elf)

          start: 0x00265000 padded size: 0x0007d000  end: 0x002e2000 :: FILESYSTEM_FILE (build\snip.ota2_example-Quicksilver_EVL\filesystem.bin)

So what I've done, I've modified the following file: "platforms/Quicksilver_EVL/ota2_image_defines.mk"

And I've modified the line #98:

# File system

OTA2_IMAGE_CURR_FS_AREA_BASE         := 0x00265000 # 876k  0x000DB000

to

# File system

OTA2_IMAGE_CURR_FS_AREA_BASE         := 0x0026F000 # 876k  0x000DB000

To give more space to the snip.ota2_extract binary to fit in its memory space.

After that modification, I am able to build the snip.OTA2_example but it gets the same exact message when I try to put it on the target (download and run).

Do you have any idea how we can fix that issue?

Thanks in advance,

Mister Kim Forest

We are trying to use two UARTs on a STM32F412ZG.  Only the UART connected to STDIO_UART works.  Each works when connected to STDIO_UART, so the hardware works.  We think we have programmed the second UART the same as STDIO_UART.

Is wiced_uart_transmit_bytes thread safe?

What could be the problems?

I am porting a IAR source code written for STM32F411 to 43xxx_Wi-Fi project  (WICED studio 6.1 installed in my PC)

( Note that IAR code is written using HAL drivers and 43xxx_Wi-Fi project is based on standard peripheral library drivers.)

I came to know currently  in WICED Studio, there is no straightforward way to do this.

Now I am thinking of modifying HAL to support SPL.

My question is regarding efforts of modifying HAL to support SPL.

Effort is too great to do this ?

Or

Less effort is required ?

I would like to do following steps in my project.

1) Create completely new project (Let us say project name is 'xyz') in WICED studio.

2) Port a IAR source code written using HAL drivers for STM32F411 to new WICED project 'xyz'.

3)  Integrate the wifi drivers present in 43xxx_Wi-Fi project  to 'xyz' project

My question is

1) Is this practically possible to do these steps?

2)  If yes what challenges i may face ?

Hi, We want to do EMC RF test for our Bluetooth/Wi-Fi comb module which uses the CYW88335 chip. The 4.8-5G harmonic interference is high. So we try to decrease the BLuetooth Tx power level. Is there any VSC command to tuning the tx power level?

Hello,
I have a problem with chip - CYW43907. When I switch power off/on (power supply) quickly (less then 1s) chip is hanging - it is not showing data on console. The state of chip is undefined and I can wait forever - state is not changing. To make it working again I need to power off/on again (and this time wait more than 1s). Have you seen such behaviour?

Is it possible that it is connected with internal POR treshold? To what voltage RESET line should get to properly reset the chip? Can I change reset voltage treshold?

Best,

Marcin