Wi-Fi Combo Forum Discussions
Hello,
I'm using CYW954907AEVAL1F board.
I'm looking foir a register enabling the programmation of the Wi-Fi Tx Power. I do not find this register in the documentation.
Is it possible?
Best regards
ecgb
Show LessWe have several board that do not have JTAG connection. Serial port (USART0 TX/RX and USART6 TX/RX) are routed in the PCB. Is it possible to download a new image from WICED over the serial port? The documentation diagram for eval board shows using USB-SERAIL but when I look at build and download scripts it seems to be using JTAG. Any help is very much appreciated.
We have a situation where the existing boards have a firmware that do not support OTA download and we donot have much information about the existing binary in the module. We have developed new firmware and is trying a way to download it to the existing hardware
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I'm using a wifi module AP6330, the chipset is BCM4330. I want create a 80211an AP with SHORT-GI (72.2Mbps).
My system is run on Linux 4.9 mainline bcmdhd, BCM4330 firmware version is fw_bcm40183b2_ag_apsta.bin
FW Version string:
4330b2-roml/sdio-ag-pool-wme-apsta-idauth Version: 5.90.195.89 CRC: 4b89dc94 Date: Mon 2013-07-22 15:40:35 CST FWID 01-b77f69d6
hostapd-2.9 with this configuration:
-----------------------------------------------
interface=wlan0
ctrl_interface=/tmp/hostapd
ctrl_interface_group=0
ssid=wifitest
auth_algs=1
wpa=2
wpa_key_mgmt=WPA-PSK
rsn_pairwise=TKIP CCMP
wpa_passphrase=11223344
hw_mode=a
channel=36
ieee80211n=1
ht_capab=[SHORT-GI-20]
max_num_sta=10
beacon_int=100
dtim_period=1
-----------------------------------------------
then I check the AP on my laptap, the max connection speed is 65Mbps
and I grap the beacon packet, the bit (SHORT-GI-20) is not set int the HTcap field
Does this chipset(BCM4330) support SHORT-GI-20 ?
Show LessHi,
I am able to write to a dev kit using a segger jlink, however when trying to program our custom hardware (which is very similar to the dev kit) it reads successfully the id 0x5BA00477 but quickly fails afterwards.
See output:
SEGGER J-Link Commander V7.63b (Compiled Mar 1 2022 16:42:47)
DLL version V7.63b, compiled Mar 1 2022 16:41:28
Connecting to J-Link via USB...O.K.
Firmware: J-Link V11 compiled Dec 9 2021 14:14:49
Hardware version: V11.00
S/N: 821008088
License(s): GDB
USB speed mode: High speed (480 MBit/s)
VTref=3.180V
Device "CYW43907" selected.
Connecting to target via JTAG
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
Identified core does not match configuration. (Found: None, Configured: Cortex-R4)
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
****** Error: Could not power up debug port: Control/Status register reads 00000F02
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
Cannot connect to target.
When looking at JTAG signals, we can see that the voltages are unexpected:
TDI/TMS: ~2.4V
TCK: ~2.5V
TDO/VTref: 3.3V
According to segger:
The J-Link has 100 Ohm serial resistors at TDI/TMS and 68 Ohm at TCK.
The voltage drop at TDI/TMS is 0.9V with 9mA load current
The voltage drop at TCK is 0.7V with 9mA load current
According to CYW43907 doc:
GPIO have programmable 2 mA to 16 mA drive strength. Default is 10 mA
Are the GPIOs set as output to GND with an empty flash?
Show LessI want to test this module WM-BAN-BM-09_S, but I can not find any information about it.
I can't contact with the USI global, they do not reply my e-mail.
Does anyone have the datasheet and firmware/nvram ?
Show LessHello.
I have developed a project using CYW954907AEVAL1F.
I need the possibility to let user to upgrade my APP without using an external programmer.
I browsed "snip/ota_fr" and I notice that it starts an OTA server (see "wiced_ota_server_start" in "ota_fr.c" row 205).
I browsed the source of OTA server on "libraries\daemons\ota2_server" and I observed that in "wiced_ota2_server.c" there are two functions that are called. The first is ...
wiced_ota2_image_write_data( BUFFER, OFFSET, SIZE)
that I understand it programs FLASH with the new incoming APP version.
I modify my project makefile by adding CYW954907AEVAL1F
$(NAME)_COMPONENTS := filesystems/ota2
and I add a call to "wiced_ota2_image_write_data" in my source.
When I try to make my project the linker says to me
"undefined reference to `wiced_ota2_image_write_data'"
What I'm missing ?
Show LessHi guys,
In my app, I connect to a wifi enterprise AP with username/password. Everything is ok until I test password with length = 63 characters. After some more testing I can see that the max length of password that not caused app to crash is 31.
So I want to confirm that 31 is the max length of the password to connect with wifi enterprise AP?
And how to change that max length to 63?
Thanks.
Show LessWe use Wiced Studio 6.6 for development of Bluetooth applications based on the Laird_Sterling Bluetooth Module (CYW4343W). We now have the need to use the Apple MFI Coprocessor to implement iAP2 over Bluetooth. How can we get sample code, examples, documentation or a Wiced Studio version including Apple MFI code or libraries ? We do have a MFI number.
Show LessMCU : CYW43907 (SB-WBM-N07P1_pEVB)
DBG : J-Link
JTAG : JTAG
Clock : 4MHz
CYW43907 JTAG for the first time with the device, there is the same error as the picture below.
JTAG first changed to SWD later and changed to JTAG,
I tried Clock and tried changing from 4M to 1000K.
It is the same symptom.
J-Link Command, and OZone are in the same state.
Could you tell me why?
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