I am working with the CYBT-343026-EVAL on wiced studio running the AD2P sink example and I modified the I2S config to run as slave by changing "route_config.is_master = WICED_FALSE" .
It seems that de data output line on the i2S bus is not able to pulled down for some reason I don't according . Per what I see in the doc this is all the configuration needed, but maybe I'm worng. Below you can see a picture of a 44.1Khz word clock line I'm using (blue) and the data output (green). Hence, I'm not having any audio on my bench as the low level is never reached. Any suggestions?
Solved! Go to Solution.
As mentioned in PCM/I2S Clock Setting in CYW20706 for Audio Applications - KBA228409, you can set I2S clock only to 44.1 kHz in master mode.
You can check following thread as well for configuration reference: Re: [CYBT-343026-01] A2DP I2S configuration (A2DP source, I2S slave) High clock rate
According to that thread that clock is supported in slave mode. So that should not be a problem. My problem here is that the data line is never pulling down as you can see in the picture I have attached.