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WICED Studio Bluetooth

MaMi_1707981
Contributor II

Can we use 3.073MHz as I2S clock for "48kHz, 16 bits, 2 channels" ?

The data rate is "48kHz, 16 bits, 2 channels -> 1.536 Mbps".

So, the clock rate is higher than the data rate.

Can CYBT343026 accept the settings ?

If yes, I think some padding data will be inserted in it.

Is the followings correct ?

    WS: 48kHz

    <Lch(16bit: MSB->LSB), padding(16bit)>,    <Rch(16bit, MSB->LSB), padding(16bit)>,    <Lch, padding>,    <Rch, padding>,  ...

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SheetalJ
Moderator
Moderator

The only configuration we support is 16bit data with 32 Clocks. MSB Stuffing is not supported.

Please refer PCM/I2S Clock setting in CYW20706 for the allowed clock configuration.

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