What are the expected default logical levels of CLK/MOSI/MISO?

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WaSu_1697556
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Hi,

What are the expected default logical levels of CLK/MOSI/MISO?

The pins don't appear to be configured with gpio_configurePin() in spi_comm_master.c

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BoonT_56
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There are no default levels but you can initialize it to be what you want. Quoting gpio_configurePin() in spi_comm_master:

gpio_configurePin(CS_PORT, CS_PIN, GPIO_OUTPUT_ENABLE | GPIO_INPUT_DISABLE, CS_DEASSERT);

You can use CS_DEASSERT to do this.

Below is also a thread on how they do this.

GPIO in high impedance mode

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BoonT_56
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There are no default levels but you can initialize it to be what you want. Quoting gpio_configurePin() in spi_comm_master:

gpio_configurePin(CS_PORT, CS_PIN, GPIO_OUTPUT_ENABLE | GPIO_INPUT_DISABLE, CS_DEASSERT);

You can use CS_DEASSERT to do this.

Below is also a thread on how they do this.

GPIO in high impedance mode

WaSu_1697556
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Hi btta,

Thanks!!