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WICED Smart Bluetooth

Anonymous
Not applicable

Hi All,

The high-level ADC interface in include/Drivers/adc.h appears to only support one-shot sampling of the ADC. In other words, the app needs to call adc_readSampleRaw() each time it wants a new sample. I need to perform a periodic analysis on a window of ADC samples collected at 11.7kHz (ADC_SAMPLE_FREQUENCY_MEDIUM_LOW). How can I do that? Does the BCM20737 implement DMA for the ADC? Or perhaps, does the BCM20737 implement a "sample-ready" ISR? I have not found a hardware manual for BCM20737 that would provide a description of all the hardware registers and their functions. If such a document exists could you please let me know where I can download it.

I have been looking at include/Drivers/20737/adc_cs.h. It does refer to continuous ADC operation:

/// bit map definition for adc intf control register

enum

{

    INTF_CTL_SAMPLE_READY               =   0x1,

    INTF_CTL_MODE_0_6P125KHZ            =   0x0 ,

    INTF_CTL_MODE_1_12P5KHZ             =   0x1 ,

    INTF_CTL_MODE_2_50KHZ               =   0x2 ,

    INTF_CTL_MODE_3_100KHZ              =   0x3 ,

    INTF_CTL_MODE_4_200KHZ              =   0x4 ,

    INTF_CTL_ADC_DITHER_DIABLE          =   0x1,

    INTF_CTL_ADC_NOTCH_FREQUENCY_DC     =   0x1,

    INTF_CTL_ADC_SAMPLE_ONE_SHOT        =   0x1,

    INTF_CTL_ADC_SAMPLE_CONTINUOUS      =   0x1,

    INTF_CTL_START_ADC                  =   0x1,

};

I am OK writing my own low-level HAL/drivers. I have done that for other platforms. Any additional documentation would be greatly appreciated.

Thanks

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1 Solution
Anonymous
Not applicable

Hello Michael,

If you go below the 12.5ms SW Timer then you may not meet the BLE timing spec.

sub-ms resolution is not possible.

There is a HW_timer patch but less 5ms you may not meet the timing.

Hope this helps.

JT

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6 Replies
BoonT_56
Employee

20737 HW manual is in the below thread: WICED Smart Documents & Downloads

This thread could be useful for a start: BCM20732S ADC Configuration

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Anonymous
Not applicable

I've look through the "WICED Smart Designer Software User Manual", "WICED Smart Hardware Interfaces", "How to Write WICED Smart Applications" and the "BCM20737 SOC Data Sheet" PDF. None of these documents provide a hardware register table and an explanation of how to set these hardware registers. Is that available documentation available for the ADC anywhere?

I am not really sure how the BCM20732S ADC Configuration post answers my question above.

Thanks,

Michael

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MichaelF_56
Moderator
Moderator

There is no register level access provided for any members of the BCM2073X family.

In addition, outside of the WICED™ Smart Hardware Interfaces document, there is no formal documentation which describes how to use the ADC, only very detailed posts from other members that have gotten the function to work.

ADC access is essentially accomplished through the API via the method described in the discussion boont pointed you to earlier.

The 12 bit (10 ENOB) ADC supports 3 voltage ranges based on VIO: 0-1.2V, 0-2.4V and 0-3.6V. Conversion time typically 10μs with a max. sampling rate of ~187 KHz (FW samples slower). What's important to understand is that the firmware sets up the channel, sampling rate, etc. and reads value back from ADC, so the ADC is really best when used for slow analog signals such as a heartbeat.

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Anonymous
Not applicable

Hello Michael,

1.  2073x HW does not support this (no DMA or ISR).

2.  ADC has to be polled by FW periodically.

Thanks,

JT

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Anonymous
Not applicable

Hi JT,

Thanks for the answer. The lack of HW support for DMA or ISR on ADC is very unfortunate.

The fine timer has a resolution of ~12.5ms. Is there any way I can setup a timer with a sub-1ms resolution?

Thanks,

Michael

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Anonymous
Not applicable

Hello Michael,

If you go below the 12.5ms SW Timer then you may not meet the BLE timing spec.

sub-ms resolution is not possible.

There is a HW_timer patch but less 5ms you may not meet the timing.

Hope this helps.

JT

View solution in original post

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