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WICED Smart Bluetooth

Anonymous
Not applicable

Hi, i'm currently trying things to make this spi2 work.

The MASTER2_P03_CLK_P02_MOSI_P01_MISO or MASTER2_P03_CLK_P04_MOSI_P01_MISO

settings don't work.

I only got a bad shaped clock on p03.

However when MASTER2_P24_CLK_P04_MOSI_P25_MISO, P4 delivers a good MOSI.

But i can't use this setting ( no pin header ), and i'm already broke the Test point...

What can i do to make this setting work ?

plese help !

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1 Solution
Moderator
Moderator

Within the SDK, please refer to the /WICED-Smart-SDK/Apps/spi_comm_master and /WICED-Smart-SDK/Apps/spi_comm_slave examples as these are tested and have been designed to work with one another on  the TAG3 board.

As you will see throughout the forum, SPI is difficult to get working initially without a proven example.

Use this example, get it working, then start to slowly make changes and add the other functionality you require within the design.

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Moderator
Moderator

Within the SDK, please refer to the /WICED-Smart-SDK/Apps/spi_comm_master and /WICED-Smart-SDK/Apps/spi_comm_slave examples as these are tested and have been designed to work with one another on  the TAG3 board.

As you will see throughout the forum, SPI is difficult to get working initially without a proven example.

Use this example, get it working, then start to slowly make changes and add the other functionality you require within the design.

View solution in original post

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Anonymous
Not applicable

The TAG board is not well suited for development of SPI solutions.  I believe the first two options you mentioned do not work because the sample Apps supplied are using the PUART on the HIGH Bank of GPIO and your Clock and MISO are on the low bank (P3,P1).  We both found that using the P24 clock and P25 MISO works, but the difficulty there is that there are no headers to connect with and the TP's for access to these ports are easily damaged by soldering leads to them which later break off.  You might try disabling the PUART or moving it to another port on the low bank which would then enable the SPI to use the configurations for which there are header pins on the board.  I don't have specific instructions for how to do this, but I believe it involves a minor code change.  Future editions of the TAG board I hope will provide header pins for P25 and P24, or else move the UART to a low bank port to make SPI development more straightforward and less problematic.

Anonymous
Not applicable

Second Option: Buy a new TAG board and carefully solder a connector wire to the P24 and P25 Test Points on the bottom of the board, add strain relief to the connectors keep the solder from breaking off the TPs, label the wires or color code so you know which is which without having to turn the board over and study it with a magnifying glass, and then handle with care....

Moderator
Moderator

Are you using PUART on P32/P33 as well (default on TAG3 board)?

If so, the lower bank wont work for SPI. This may be the issue and would explain why the second set of settings you used worked.

Also, how are you configuring the clock (speed and sampling)?

Anonymous
Not applicable

I think I ran across the P32 P33 settings for PUART in the platform.h file last night.

Perhaps one could change these to low bank settings for compatibility with the low bank SPI configuration.

Also there is a line of code that will disable PUART I believe.  I think it is in the forum threads somewhere... have not tried that yet.

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