20732S layout question

[legic_1490776]

I am experimenting with an application based on the 20732S, and looking at the power draw.

I've noticed that when the device is in a low rate advertisement state, the current gets down to around 60 microamps.  But if i touch my finger on side 'C' of the chip (over the keepout area), the current starts ramping up to a much higher level in the mA range. 

I wanted to ask if this is an expected behavior, or if this means there is something wrong with my layout?

I imagine that perhaps this messes up the antenna and causes the chip to react by ramping up power somewhere?

The final application will be in an enclosure that prevents this from happening but my concern was whether my board design is somehow making the system flaky.

[MichaelF_56]

Lewis,

Is this still an open issue, or was it addressed in another discussion?

[legic_1490776 · Accepted solution]

It appears that this was caused by inadequate grounding in the layout.  In my original design the ground pads were connected by fairly thin traces and it's possible there could be voltage differences between them.  In my new design all ground pads are connected by a pour, and the problem seems to have gone away.

BTW this bizarre behavior was witnessed by a broadcom field engineer who was supporting me, and in that instance the poor grounding actually caused the chip to self-destruct by drawing a large current.

I definitely recommend to anyone using the chip to ensure adequate grounding, as in the layout now published on this site.  (Unfortunately when I did my original design there were no sample layouts published)

[MichaelF_56]

Thanks for the clarification Lewis as this should be useful to others.