USB

Hello,

We are using CY7C65215-32LTX in our board as USB2UART bridge, we are using SCB0 only (to get 3M baud) and we face two issues:
a) We configured the system to 3Mbit (including RTS/CTS)but we are getting max baud rate of 2.1Mbit (single direction form UART to USB ) instead of 2.4Mbit  (decreasing all the start stop bits etc from 3Mbit).
We are using updated Windows driver 3.13.0.84

b) Beside the baud rate issue if we are trying to send commands (USB to UART direction) during the 2.1Mbit data (describe in question#1) we are missing several bits .

Thanks you

Efi

I have found some stock in a CCG4 part but there are some extra characters at the end of the part number.  Does anybody know what these extra characters mean?

CYPD4225-40LQXI / FW: HTC AR 4

Any help is greatly appreciated. 

According to the documentation ("Designing with the EZ-USB FX3 Slave FIFO Interface"), the propagation delay for the (watermark/ready) flags from the rising edge of the clock is max. 8 ns (tcflg) without specifying a minimum. So one has to assume it can be anywhere between 0 and 8 ns, right? But if correct that would mean that with a 100MHz GPIF-clock which has a period of 10 ns, one only has a 2 ns window to correctly sample the flag values. When eg. interfacing with a FPGA this means it's a "challenge" or it least not very easy to get the timing constraints right to make this reliably work.

Am I correct? And if so: what are the recommendations to do this the proper way?

Hello,

    Will source code for Cyusb3.sys be made available? I want to modify source code to add or remove some feather from driver.

    best, regard.

Hello everybody,

i have a CY7C65213-32LTXI chip on my custom board.

It should work as a UART interface,

but when i connect to it it says it is in  CY_TYPE_MFG mode and no UART SetFunction or even GetConfig will work.

- I tried to program it with "USB Serial Configuration Utility.exe" but it wont change the Device type...

- Do i need to program the Flash or what?

- even if, where can i get a binary to flash??

- or is it just the wrong driver???

tnx in advance

Currently, I use FX3 as a bridge for communication between a PC and an external FPGA board as shown below:

               read/write FPGA register request                  

PC      ---------------------------------------------->  FX3 ------------------------------------>  FPGA

               read FPGA data request                                   

In this design, FX3 GPIF is a synchronous master and used to:

1. read/write register space from/to FPGA;

2. read data space (FIFO) from  FPGA.

The two spaces of the FPGA are distinguished by an adress line of the GPIF interface, e.g. 1 for register space and 0 for data space.

on FX3 side, I tried to use three threads: the first thread (thread0) is used to read register value from the FPGA, the second one for writing FPGA register, and the thrid one for reading FPGA data, so I create three DMA channels as follows:

1.DMA1.prodSckId = 0x0102;      01: GPIF;        02: Thread 2;       //for reading FPGA registers

   DMA1.consSckId = 0x0302       03: USBOUT; 02: socket number 2 and mapped to end point IN 2;

2.DMA2.prodSckId = 0x0401;      04: USBIN;      01: socket number 1 ;   //for writing FPGA registers

   DMA2.consSckId = 0x0103       01: GPIF;        03: thread 3;

3.DMA3.prodSckId = 0x0100;      01: GPIF;        00: Thread 0;  //for reading FPGA data

   DMA1.consSckId = 0x0301       03: USBOUT; 01: socket number 1 and mapped to end point IN 1;

Now, the DMA2 and DMA3 can work well, that is, PC can sucessfully write register to FPGA and read data back from FPGA, but PC can not read FPGA register through DMA1 channel.

My question is that, if FX3 GPIF as a synchronous master, can more than one thread be used to transfer data from outside to FX3 engress end points? or there are any configuration errors in the DMA channel creation?

Your suggestions are very appreciated!

Scott