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i want to use EP0 to set some parameters from host to device.
i save the EP0 data from the databus to a buffer A, and than use DMA channel transfer buffer A to a PIB socket.
i want to get the flagC(correspond to the PIB socket),but i can’t see the change of the flag.
that is my programs,give me some advice plz! thank you!
if(bType==CY_U3P_USB_VENDOR_RQT)
{
if(bRequest==JY_DE_CODE_TYPE) //user-defined
CyU3PUsbGetEP0Data(wLength, &buffer, NULL);
CyU3PDmaBuffer_t buf_p;
buf_p.size = 64;
buf_p.count = 64;
buf_p.buffer = buffer;
buf_p.status = 0;
CyU3PDmaChannelSetupSendBuffer (&glChHandleSlFifoUtoP, &buf_p);
//glChHandleSlFifoUtoP is a DMA channel which i build.
CyU3PDmaChannelCreate (&glChHandleSlFifoUtoP,
CY_U3P_DMA_TYPE_MANUAL_OUT, &dmaCfg);
}
Jack chen
Solved! Go to Solution.
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Hello,
As you are trying to use the DMA channel in override mode, the API CyU3PDmaChannelSetXfer() should not be called for the DMA channel whose handle is glChHandleSlFifoUtoP. Please comment out this section of code as shown below:
Also, I found that from your code, the first error (0x43) was for CyU3PDmaChannelSetupSendBuffer() and the second error (0x46) was for CyU3PDmaChannelWaitForCompletion(). Both of these errors are due to incorrect use of override mode. By commenting out the lines of code as I mentioned before, both of these errors can be avoided.
After making this change, please check if you are able to transfer the data successfully to the FPGA.
Best Regards,
Jayakrishna
Jayakrishna
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Hello,
Please let us know the following to understand the issue better:
1. Is the project that you are using now a modified form of AN65974? Or is it a new project as such.
2. I believe that the channel is created before calling the API CyU3PDmaChannelSetupSendBuffer(). Please confirm this.
3. Please share the complete project along with GPIF II Designer files so that we can understand the implementation better.
Best Regards,
Jayakrishna
Jayakrishna
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hello,
thanks for your reply.thanks a lot!
1. the project Is a modified form of AN65974.What i have confirmed is that the channel was created before calling the API CyU3PDmaChannelSetupSendBuffer() 。The project of AN65974 has two endpoints of bulk and the project base on slavefifo mode.there is an accessory which includes my FW.
We plan to use one bulk eps(0x81) to recieve datas from device and delete another bulk eps(0x01).And use ep0(0x00) set some device parameters in control transfer mode.
2.the qustion is as follow:
FPGA can't get the flagC(low);
3.my thought is as follow:
2.1 use CyU3PUsbGetEP0Data(wLength, &buffer, NULL); get datas from EP0 and save them in 'buffer'.
2.2 use a DMA channel send datas in the buffer to PIB_Socket_3.
2.3 i expect that the flagC become low when the buffer is empty. And FPGA config the signal(slcs slrd slwr..)according to the state of flagC .
4.my main code as follow:
4.1 this my configure of flagC. i hope flagC map with thread3.
4.2 in cyfxslfifosync.c
4.2.1 in CyFxSlFifoApplnInit (void); i use CyU3PGpifSocketConfigure (3,CY_U3P_PIB_SOCKET_3,6,CyFalse,1);
and i hope that thread3 maps with PIB_SOCKET_3 so that flagC map with PIB_SOCKET_3.
4.2.2 in CyFxSlFifoApplnStart (); i creat a DMA channel connect CY_U3P_CPU_SOCKET_PROD with CY_FX_CONSUMER_PPORT_SOCKET. (in my understand, this DMA channel connent the buffer with the PIB_SOCKET_3)
4.2.3 in CyFxSlFifoApplnUSBSetupCB i analysis the control request and get the data from EP0 in the buffer
4.2.4 invoke my defined function to start DMA transfer
Jack chen
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hello,
i want to use EP0 send data from host to device.i need some resource such as routine or solution.
Jack chen
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Hello,
Can you please share the GPIF II Designer project with us? As per your firmware, the data paths are:
1. CPU socket -> P Port Socket 3
2. P Port Socket 0 -> USB CY_U3P_UIB_SOCKET_CONS_1
As you mentioned, the API CyU3PGpifSocketConfigure (3,CY_U3P_PIB_SOCKET_3,6,CyFalse,1); will map P Port socket 3 to Thread 3. We need to check if Flag C is mapped to Thread 3 itself. Also, we would like to understand how the Flag C is configured. For this, we would need the GPIF II Designer project. Please let us know if FLAG C is configured as DMA Ready flag for Thread 3 as is done in the default AN65974 state machine. Also, please confirm that you are using Watermark flag for stopping the data transfer from the FPGA side.
In addition to this, please let us know the return status of the APIs CyU3PDmaChannelSetupSendBuffer() and CyU3PDmaChannelWaitForCompletion() inside the function CyFxaaa().
Currently we do not have an example project to share for your application. We can help you to debug the issues with your current approach.
Best Regards,
Jayakrishna
Jayakrishna
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Hello,
thanks a lot for your help.
there is an accessory of my GPIF II design.
the return status of the APIs CyU3PDmaChannelSetupSendBuffer() and CyU3PDmaChannelWaitForCompletion() is CY_U3P_ERROR_WAIT_ABORTED(26)
some situation as follow:
1.when i set the DMA size equal zero,the control center will fail with enum.(i refrence the application from SDK called cyfxusbi2cdmamode.c)
dmaconfig.siza=0;//enum will fail
2. the control center enum issvery slowly,approximately spend 20s-30s.
3.error 997 happen occasionally.
Jack chen
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Hello,
Neither of the APIs CyU3PDmaChannelSetupSendBuffer and CyU3PDmaChannelWaitForCompletion returns error code 26 (CY_U3P_ERROR_WAIT_ABORTED). Please cross check once again and let us know the correct return status for each of the APIs. This is required for us to debug the issue.
Please do not set the size of DMA buffers as 0. You can set it as 32 bytes itself as you did before.
dmaCfg.size = 32;
Also, please confirm that you are using Watermark flag for stopping the data transfer from the FPGA side.
Best Regards,
Jayakrishna
Jayakrishna
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Hello,
both of two APIs return 26;
i have confirmed that FPGA side use the Watermark flag for stopping the data transfer .
my setup as follow
dmaCfg.size=32;dmaCfg.count=1;
Best Regards,
Jack chen
Jack chen
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Hello,
Please confirm that you are using SDK 1.3.4 for development. Please change the function CyFxaaa as follows:
After this modification, please send a vendor command so that the function CyFxaaa is invoked. Please share the UART debug logs of this test for us to check.
In addition to this, the DMA channel configuration can be the same as that in the project shared before. Please find the snapshot of the same below:
Best Regards,
Jayakrishna
Jayakrishna
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Hello,
I have changed the cyaaa function as your picture.And the DMA channel configuration has a difference in dmaCfg.count. I set dmaCfg.count=1(because if i set it equal with zero, the control center enum will fail).
I am sure that CyFxaaa is invoked.The uart logs as follows:
Best Regards,
Jack Chen
Jack chen
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Hello,
As per the shared debug logs, only the API CyU3PDmaChannelSetupSendBuffer() is failing. The error codes are 0x43 and 0x46.
The project shared before and the project that you are testing now seems to be different. Can you please share the current project for us to check?
In addition to this, how are you testing the project? Is it on a custom board or are you using the Superspeed explorer kit? This information is required to check if we can reproduce the issue at our end for faster debugging.
Best Regards,
Jayakrishna
Jayakrishna
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Hello,
the project shared before is same as the project testing now.
the reason why the error code has a differet with last email maybe my last test does not use the uart.
the error code 43/46 is my first use uart debug.
Jack chen
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Hello,
As you are trying to use the DMA channel in override mode, the API CyU3PDmaChannelSetXfer() should not be called for the DMA channel whose handle is glChHandleSlFifoUtoP. Please comment out this section of code as shown below:
Also, I found that from your code, the first error (0x43) was for CyU3PDmaChannelSetupSendBuffer() and the second error (0x46) was for CyU3PDmaChannelWaitForCompletion(). Both of these errors are due to incorrect use of override mode. By commenting out the lines of code as I mentioned before, both of these errors can be avoided.
After making this change, please check if you are able to transfer the data successfully to the FPGA.
Best Regards,
Jayakrishna
Jayakrishna
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Hello,
Very grateful for your help!!
The host is able to transfer datas successfully to the FPGA.
According to the flag,FPGA change some pins state(slcs,slwr,slre...) to do the flow control.So there is another question that how does the PC software(i use the Cylib) do flow control.
For example,I want to know what will PC software do when the PC software to write into buffer but the buffer is full.Or the PC software to read but the buffer is empty.
My task is both FW develop and PC software develop.
By the way, can u provide the 76074TRM(Chinese Version) or other resource which can help me develop the PC software.my english is not good,so thanks for your patience.
Jack chen
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Hello,
If you are using one IN Endpoint and one Out Endpoint for data exchange between FPGA and host, then if you have all the buffers full and try to send data to the device, the xferdata API used at the host side will return a timeout error. The same happens if you try to read data through the IN endpoint and the buffers are empty.
In this case, as you are using control endpoints for data transfer, you can make use of custom vendor commands to inform host that the device is ready for data transfers. When the device has buffers free to fill the data, you can set a flag. Then you can make use of a vendor command to check the state of this flag. If the flag is set, then you can transfer data through the control endpoint. Otherwise, repeat this procedure until you get the flag set.
Regarding your question " By the way, can u provide the 76074TRM(Chinese Version) or other resource which can help me develop the PC software.my english is not good,so thanks for your patience",
I feel that this question is different to the original topic for which this thread was created. I would recommend you to create a thread in Chinese requesting the document that you need so that one of our Chinese AE will help you with it. You can carry forward with the discussions on host application development in the new thread. Please do this so that other community members can also get the benefit out of it.
Best Regards,
Jayakrishna
Jayakrishna