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I have a hardware question about data aquisition in FX3 design.
For example, I have an ADC which has two output: the ADC clock and parallel data which is synchronized to the clock. Since it is an external clock to CYUSB3014 chip, lets say the data rate is 100MS/s. How should I configure the CYUSB chip to read the data correctly? The another way to ask this question is: how to make sure the sampling time of the CYUSB (using GPIF II) is synchronized to the external ADC clock.
If the ADC clock is fixed to be 104MHz, then if I use a divider to generate a 52MHz clock to be the CYUSB reference clock, in this way, will the data acquisition time automatically synchronized to the ADC clock?