cyusb3kit-003 data bus routing

[Anonymous]

        I'm designing an FPGA board that connecting to the cyusb3kit-003. since I plan to use its full bandwidth , I figured I must adjust the data bus' tracks lengths so the signals arrive at the distention at the same time. For that I need to measure data bus' tracks lengths on the cyusb3kit-003 board itself, but I can't open the hardware files with my allegro 16.5 . first of all do I need to adjust the tracks' lengths? then if I do , do I need to measure them on the cyusb3kit board? And what I need for opening those hardware files and what the problem is ?   

[Anonymous · Accepted solution]

Hi,

   

You can use the GC Prevue viewer for viewing the Kit's layout files.

   

Also, you need to measure the lengths of the signals in the board. You just have to ensure that the lengths of the GPIF signals traces do not vary very much from one another.

   

Regards,

   

-Madhu Sudhan