USB superspeed peripherals Forum Discussions

I am a new programmer, and am learning about the FX3 through the SuperSpeed Device Design by Examble book, currently i am trying to replicate the visual studio examples coverered in chapter 7 using the CyAPI.lib library to develop host aplications, but i cant seem to compile them in visual studio community 2022, i keep getting the same error and im not sure wether  im not linking the library properly or missing something else. i attached a screenshot of said error, can someone help me with this? please and thank you.

p.d. i am using windows 10

I have been working with FX3 USB for about 10 years now, with various success to debug.

But recently I received a new laptop with Windows 11 installed from scratch.

It works fine with the FX3 USB using release compiled code, but as soon as I try to debug it stops working.

The USB device shows up as normal, but it fails to start with the error message:

"Insufficient system resources exist to complete the API".

If I google this, they blame it on the driver... I'm using the latest driver that is included with FX3 SDK 1.3.4.

I have installed FX3 SDK 1.3.3 with eclipse since I have seen issues to debug with 1.3.4, but I'm compiling with SDK 1.3.4 (I have also tried SDK 1.3.3).

My old laptop is also running Windows 11, but it was updated from Windows 10 which seem to give a difference for some devices / apps. And there are no major issues to debug using the old laptop.

I could also mention that if I have the FX3 USB device connected at boot time, I will get the same issue. But if I connect it after boot everything works fine. I didn't have this issue with the old laptop.

Any suggestions on how I could proceed to get it working?

Hi.

We are not able to get the register sets for MT9M114 & MT9J003 sensors. Can you please help us with the register sets for both and sensor.c & sensor.h file for MT9J003 sensor will be great.

Thanks in advance.

Rgds,

Vino

Hi,  I am having the FX3 development kit that's supposed to work with the aptina MT9M114 sensor(Image sensor).  we are planning to change aptina  MT9J003 sensor. but I am struggling to change the register parameter.

datasheet doesn't have direct register address. kindly help me to develop the image sensor. 

some registers I changed but that's are correct  or not I don't know. that are below 

Sensor. H

/* I2C Slave address for the image sensor MT9J003. */
#define SENSOR_ADDR_WR 0x20 /* Slave address used to write sensor registers. */
#define SENSOR_ADDR_RD 0x21 /* Slave address used to read from sensor registers. */

Sensor .c

SensorI2cBusTest (
void)
{
/* The sensor ID register can be read here to verify sensor connectivity. */
uint8_t buf[2];

/* Reading sensor ID */

if (SensorRead2B (SENSOR_ADDR_RD, 0x00, 0x00, buf) == CY_U3P_SUCCESS)
{
//if ((buf[0] == 0x24) && (buf[1] == 0x81)) //MT9M114
if ((buf[0] == 0x2C) && (buf[1] == 0x01)) //MT9J003
{
return CY_U3P_SUCCESS;
}
}

Regards

Vinohari (+91 8861223731 )

Hi, 

• In my application, some values should be written to GPIF, then the GPIF switches to read and transfer what was read to USB.
• I used this example (C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\boot_fw\gpiftousb) to build my application, and changed the cyfxgpif2config.h to the one generated from GPIF II Designer (shown below)
• Once this file is switched, the USB streaming fails with error 997
• is there a reason for that?

/*
 * Project Name: AD7381-4 Interface to USB3.cyfx
 * Time : 11/19/2022 18:51:09
 * Device Type: FX3
 * Project Type: GPIF2
 *
 *
 *
 *
 * This is a generated file and should not be modified
 * This file need to be included only once in the firmware
 * This file is generated by Gpif2 designer tool version - 1.0.1198.2
 * 
 */

#ifndef _INCLUDED__
#define _INCLUDED__
#include "cyu3types.h"
//#include "cyu3gpif.h"

/* Summary
   Number of states in the state machine
 */
#define CY_NUMBER_OF_STATES 4

/* Summary
   Mapping of user defined state names to state indices
 */
#define START 0
#define CONFIG_ADC 1
#define ACTIVE_READ 2
#define IDLE 3


/* Summary
   Initial value of early outputs from the state machine.
 */
#define ALPHA_START 0x13


/* Summary
   Transition function values used in the state machine.
 */
uint16_t CyFxGpifTransition[]  = {
    0x0000, 0xFFFF
};

/* Summary
   Table containing the transition information for various states. 
   This table has to be stored in the WAVEFORM Registers.
   This array consists of non-replicated waveform descriptors and acts as a 
   waveform table. 
 */
CyU3PGpifWaveData CyFxGpifWavedata[]  = {
    {{0x1E739C01,0x04000000,0x86000800},{0x00000000,0x00000000,0x00000000}},
    {{0x1E739C03,0x00000500,0x80400000},{0x00000000,0x00000000,0x00000000}},
    {{0x1E739C02,0x20000000,0xC7800800},{0x00000000,0x00000000,0x00000000}}
};

/* Summary
   Table that maps state indices to the descriptor table indices.
 */
uint8_t CyFxGpifWavedataPosition[]  = {
    0,1,1,2
};

/* Summary
   GPIF II configuration register values.
 */
uint32_t CyFxGpifRegValue[]  = {
    0x800083B0,  /*  CY_U3P_PIB_GPIF_CONFIG */
    0x00000003,  /*  CY_U3P_PIB_GPIF_BUS_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_BUS_CONFIG2 */
    0x00000052,  /*  CY_U3P_PIB_GPIF_AD_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_STATUS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INTR */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INTR_MASK */
    0x00000082,  /*  CY_U3P_PIB_GPIF_SERIAL_IN_CONFIG */
    0x00000782,  /*  CY_U3P_PIB_GPIF_SERIAL_OUT_CONFIG */
    0x00000001,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_DIRECTION */
    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_DEFAULT */
    0x00000001,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_POLARITY */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_TOGGLE */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
    0x00000006,  /*  CY_U3P_PIB_GPIF_CTRL_COUNT_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_COUNT_RESET */
    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_CTRL_COUNT_LIMIT */
    0x0000010A,  /*  CY_U3P_PIB_GPIF_ADDR_COUNT_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_ADDR_COUNT_RESET */
    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_ADDR_COUNT_LIMIT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_STATE_COUNT_CONFIG */
    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_STATE_COUNT_LIMIT */
    0x0000010A,  /*  CY_U3P_PIB_GPIF_DATA_COUNT_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_COUNT_RESET */
    0x0000FFFF,  /*  CY_U3P_PIB_GPIF_DATA_COUNT_LIMIT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_COMP_VALUE */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CTRL_COMP_MASK */
    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_COMP_VALUE */
    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_COMP_MASK */
    0x00000000,  /*  CY_U3P_PIB_GPIF_ADDR_COMP_VALUE */
    0x00000000,  /*  CY_U3P_PIB_GPIF_ADDR_COMP_MASK */
    0x00000000,  /*  CY_U3P_PIB_GPIF_DATA_CTRL */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_DATA */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
    0x00000000,  /*  CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
    0x80010400,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
    0x80010401,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
    0x80010402,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
    0x80010403,  /*  CY_U3P_PIB_GPIF_THREAD_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_LAMBDA_STAT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_ALPHA_STAT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_BETA_STAT */
    0x00130000,  /*  CY_U3P_PIB_GPIF_WAVEFORM_CTRL_STAT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_WAVEFORM_SWITCH */
    0x00000000,  /*  CY_U3P_PIB_GPIF_WAVEFORM_SWITCH_TIMEOUT */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CRC_CONFIG */
    0x00000000,  /*  CY_U3P_PIB_GPIF_CRC_DATA */
    0xFFFFFFC1  /*  CY_U3P_PIB_GPIF_BETA_DEASSERT */
};

/* Summary
   This structure holds all the configuration inputs for the GPIF II. 
 */
const CyU3PGpifConfig_t CyFxGpifConfig  = {
    (uint16_t)(sizeof(CyFxGpifWavedataPosition)/sizeof(uint8_t)),
    CyFxGpifWavedata,
    CyFxGpifWavedataPosition,
    (uint16_t)(sizeof(CyFxGpifTransition)/sizeof(uint16_t)),
    CyFxGpifTransition,
    (uint16_t)(sizeof(CyFxGpifRegValue)/sizeof(uint32_t)),
    CyFxGpifRegValue
};

#endif   /* _INCLUDED__ */

Hello,

We are embarking on a new camera product and looking for a Camera Controller Chip with multiple (at least 2) MIPI CSI2 inputs. CYUSB3064/65 series are pretty much the ones close to our needs but they are only equipped with 1 MIPI CSI channel.
Can anyone here please suggest a similar chip with multiple MIPI CSI2 inputs or share your thoughts on multiple MIPI CSI2 input schemes?

Many thanks.

Hello
Is there a way to detect rising edge of FV instead of detect it on high state?

I have a application where we could not relies on the FV high, but it need to relies on FV rising edge. Any possible way to detect this?

Thanks

Hello, I have created  a Interface between Xilinx FPGA and CYUSB3014 FX3 controller. We are running in slave FIFO 32 bit data mode. We are transmitting  a packet size of 32KB as of now from the FPGA. We want to now increase the payload to 64KB. What configurations in the source code needs to be changed on the controller side?

Hello!

I am interfacing the IIS2DH sensor, and I can configure its registers and can read most of them. I have a pair of registers where I should read 2 registers one after another. For that I have to alter the lower register's address to put the IC into the auto address incrementing mode. I configured the IC and the registers based on the datasheet based on the conversation with the manufacturer I did it in a proper way. The IC's datasheet mention the proper I2C communication for the case of multiple byte read (attached that part):

I am using the FX3 based I2C communication functions:

CyU3PReturnStatus_t acc_i2c_readInc(uint8_t slave_addr, uint8_t reg_addr, uint8_t *buff)
{
	CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS;
	CyU3PI2cPreamble_t preamble;


	if ((slave_addr != ACCEL_ADDR_RD) && (slave_addr != I2C_MEMORY_ADDR_RD))
	{
		CyU3PDebugPrint (4, "I2C Slave address is not valid!\n");
		return 1;
	}
	preamble.length    = 3;
	preamble.buffer[0] = slave_addr & I2C_SLAVEADDR_MASK;        /*  Mask out the transfer type bit. */
	preamble.buffer[1] = reg_addr;
	preamble.buffer[2] = slave_addr ;
	preamble.ctrlMask  = 1<<1;                                /*  Send start bit after second byte of preamble. */
	CyU3PDebugPrint (4, "Reg address%d\n",reg_addr);
	apiRetStatus = CyU3PI2cReceiveBytes (&preamble, buff, 2, 0);
	SensorI2CAccessDelay (apiRetStatus);


	return apiRetStatus;

}

I modified the CyU3PI2cReceiveBytes function byteCount variable 1 to 2. Is this implementation is capable to read 2 bytes in an address auto incrementing situation? The buff pointer points to an array, so if I receive 2 bytes I can store it.

Best regards,

Bence