USB superspeed peripherals Forum Discussions
Hi,
I would like to set up the slave fifo FLAGB so that it shows "almost full". You mentioned that we have to use CyU3PGpifSocketConfigure() function. I have some questions regarding this function and its application:
1. In the summary of the function, it mentioned that
"This function allows the user to select and configure the active socket in the case
where software is responsible for these actions. The API will respond with an error
if the hardware is taking care of socket configurations."
What does it mean "software" or "hardware"?
2. What number should I write for watermark if I want to support both USB2.0 and USB3.0. In other words, should I write 511 or 1023 to make the flag works as "Almost Full"?
3. What I should write instead of the burst? I would appreciate it if you could be specific and refer me to a number which I can find in the slave fifo project (*.c or *.h file).
Thanks,
Nazila
Show LessHi
I have 2 questions
1.) in final design fx3 will work as slave fifo and it will be booted from an eeprom through i2c. Does that mean that we need to check the box near the i2c in gpif2 designer?
2.) By choosing i2c in gpif2 does that mean that we are implementing i2c communication to fx3 or only boot option.
thank you
Show Less1) What is the EPSWITCH pin for? It is in the GPIF interface description, but I cannot find any documentation of what it does.
2) If I made a new Slave FIFO specification, using the GPIF II Designer, by building off of one of the provided Cypress Slave FIFO interfaces, can I simply switch out the generated header file with the header in the cyfxsyncslfifo example and have it immediately work?
In short, can the SDK examples be treated as a framework, with which you can simply switch out a new GPIF header?
(Obviously, you would need to declare any new pins as outputs / inputs, make sure the directions are right, etc., - I'm more referring to the CyFX function calls that setup the GPIF state machine from within the firmware).
Show LessI am trying to do a project using the FX3 SDK similar to the one described in AN4053 for the FX2. Does Cypress have a software project for this, or do I need to translate the firmware to something that will compile and run on the FX3 SDK? Any help or advice would be greatly appreciated as this is my first attempt at using this type of device.
Show LessWhat is IO driver strength for FX3 chip ?
Hi everyone,
In the "GPIF II Actions" section of the documentation I came across several macros that were mentioned. For example the IN_DATA action says "The data in Register can be accessed using CY_U3P_PIB_GPIF_INGRESS_DATA(thread_number) macro", and the DR_DATA action says "The data in Register can be sourced using CY_U3P_PIB_GPIF_EGRESS_DATA(thread_number) macro". However I was not able to find any documentation on CY_U3P_PIB_GPIF_INGRESS_DATA and CY_U3P_PIB_GPIF_EGRESS_DATA after looking in the API guide. Has anyone used either of these methods or has any idea how to implement them?
I am trying to set up the FX3 as a master with an FPGA as slave, using the P port and GPIF as the connecting interface.
Show LessI see in the GPIF II designer instalation you prowide only slave samples... could you also prowide some GPIF master applications? particularly for control of sync SRAM's and FX3 as master.
Do you have also samples how to use the API functions CyU3PGpifWriteDataWords() and CyU3PGpifReadDataWords() with GPIF project?
Many thanks
Show LessHi
i am wondering where can i find description of regData structure passed to CyU3PGpifConfig_t (FX3APIGuide.pdf pp.363). When i runf gpif designer i get the cyfxgpif2config.h file. How ever i would like to have possibility of fine tunning the parameters.
Also does GPIF generate the appropriate functionality for i2c, since there is an option "FX2 peripherials used".
Thank you
Show Lessas title.