USB superspeed peripherals Forum Discussions
Hello, all,
Our group still decided to use the I2S to transfer small command packets from PC to FPGA, though I got recommendation for I2C from Mr. Sai Krishna. Any firmware example, self-written codes, related information or suggestions will be appreciated.
Hello, everyone. Now I can run the Slave FIFO Asynchronous example with the evaluation board. I still want to know how to check the transfer speed of the Slave FIFO GPIF. With the UART debugger, I find the data transfer is not so fast in Slave FIFO Asynchronous example. How could I increase the transfer speed and what is the maximum transfer speed we can get?
Thanks,
Lehua Chen
Show LessI need to set the MS OS String Descriptor (index = 0xEE)
This is necessary for WinUSB class driver support on Windows 8.
But a call to CyU3PUsbSetDesc(CY_U3P_USB_SET_STRING_DESCR, 0xEE,...)
just fails, returning Error code = 75
I assume this is because the descriptors are hardwired to IDs 0 to 15?
Can we get a fix for this?
Am I going to have similar trouble with OS Feature descriptors?
Thanks
Show LessI am trying to test the slave Asynchronous fifo GPIF. The control pins were fixed as following:
SLCS set to 0 (0V)
SLWR set to 0
SLRD set to 1
PKEND set to 1
ADRESS set 00
Hello. In the Slave FIFO example, the dmaCfg.count is set to 2 (Slave FIFO channel buffer counts 2). When the data is transferred from U to P, the data is written to the first buffer at the first time and written to the second buffer at the second time. After that, if the Reading from Slave FIFO (SLRD) is not active, the buffer will be always full and no more data can be written. Once the Reading from Slave FIFO starts, the buffers will be clean and ready for the next transfer. Is my understanding right?
My Visual Studio application uses the function DownloadFw from the CyAPI.lib to download a new img file (USBBulkLoopAuto) into ram of the FX3 evaluation board. However the img seams to be download correctly but the DownloadFw call always return FAILED. Same observation with ControlCenter (Programming Failed).
I use vista on a 32 bits system.
Any idea?
Show LessDear Cypress,
I need to interconnect your development kit with a FPGA board. So my question is, it is possible to get schematics for USB3.0 development kit? Also BOM could be very helpful.
Kind Regards,
Pavol Korcek
Show LessHello, I want to debug the SlaveFifoAsync example with UART. I found the setting process for debugging with JTAG in the programming manual. How could I debug it with UART? Are there some documents about debugging FX3 with UART?