USB superspeed peripherals Forum Discussions

 Hi

i have a device where my FX3 is connected to FPGA as a slave fifo. In gipf i configured 4 flags

1.) FLAG_A => OUT RDY

2.) FLAG_B => OUT WATERMARK

3.) FLAG_C => IN RDY

4.) FLAG_D => IN WATERMARK

I can see that IN endpoint is up and running. Clearly the FLAG_C indicates everthing is ok. Also when i send data from Host to Device i can see that it is correctly received.

However OUT Endpoint is not ready ever. From the beginning the FLAG_A indicates that OUT EP is down. If i decide to ingore the FLAG_A and just write into FX3 clearly the data is never transfered to host.

If i strobe the PKTEND my host will always read zero-length packet.

Anyone had simillar issue. Can you help me what could be reason for this strange behvaiour?

Thank you

Mirza

Hi:

    I have a board with an FX3 connected to an FPGA where the GPIF is the synchronous 2bit mode.and configure one producer(gpif),two consumers(endpoint1,endpoint2),what is the result?is it the same data sent to host through endpont1and endpoint2?if not,how to transmit datas to two consumers?

I am playing around with isochronus transfers and I cant seem to get them to work.  A few forum posts say that multi burst transfers only work on endpoint 3 or 7.  What do I need to set to acheive this?

 I tried adding an olimex debugger to cypress FX3 board, but i am not able to do it !!

Got some help from this post http://www.cypress.com/?app=forum&id=167&rID=78322

But still i am getting an error which i have attached an image, please help

Thanks 

Rags

 If I use the counter mode of an FX3 input, what is the highest frequency signal I can input?

Thanks

Jon

Hi,

I've read in one of the app notes that I could swap differencial pair polarity (N -> P, P -> N). I assume that this applies only to pairs of Tx and Rx, right? Or D+ and D- could also be swapped?

I think that D+/D- can't be swapped becouse one pair polarity must be known to negotiate another two. Am I right?

Or maybe polarity inversion is not desirable even on Tx/Rx pairs?

Best regerds,

MP

 By this the FX3 has to send the data within itself without sending it through the bus. Is this possible ?

Also when i try to create a dma channel with P port as producer and cpu as consumer, channel creation fails , why is this ?

Rags

I have a simple firmware that does a short bulk transfer like this:

CONTROL_OUT-> sends a few bytes of information

BULK_IN <- read a couple bytes of data

BULK_IN <- read a few more bytes of status information

This works correct when I first boot the firmware and run my test.  If I try to run the test again though (firmware still running but close and reconnect to the device with the driver) I get:

CONTROL_OUT-> sends a few bytes (information received on device correctly)

BULK_IN <- timeout.  On the device side the dmabuffer functions were obtained and no error code was submitted.  The data for the 2nd BULK_IN is also committed to a dma buffer w/ out error.

If I try 3-4 times without re-connecting the device gets back in a state where the test passes.  From that point I can execute the test as fast as I want or as many times as I want and it'll continue to pass.  But if I close the device and reconnect (calls SET_CONFIGURATION, AppStop/Start again), the device is back in a state where the first few commands don't transfer the data correctly.

I'm using wireshark w/ usb monitoring on Linux.  The BULK_IN transfer alternates error status of -EPROTO -71 and -ENOENT -2 when the BULK_IN call fails.

If I execute a BULK_OUT instead of bulk in like this:

CONTROL_OUT-> send a few bytes (ok)

BULK_OUT-> send a few bytes 

BULK_IN <- read status

The OUT data is received on the device but the IN data that is the status again has a timeout or error transferring.  Again, if a few attempts are made the device gets back in a state where transfers work as expected.

Anyone have a suggestion as to why this might be happening?  I've stripped my firmware down to almost exactly what happens in the basic firmware examples:

appStart->configure endpoints and dma channels

handle_vendor_commands->minimal application logic 

Thread_Entry->read/write data to dma channel buffers.

appStop->unconfigure endpoints and dma channels

So when I reconnect, stop/start gets called when SET_CONFIGURATION is called, but I've tried disabling the code that tears down and reconfigures the endpoints as a test but it behaves exactly the same.  It seems like there might be some other API call needed to reset back to a working state after SET_CONFIGURATION perhaps.