USB superspeed peripherals Forum Discussions
we are designed usb sd3 based custom board. we have ported example illustrates the use of the FX3S firmware APIs to implement mass storage class device that allows access to SD/MMC devices connected to SD3 given along wit SDK.
The application partitions the storage device found on storage port into two volumes, and then enumerates them as separate logical units on the USB side
in that example partitions define by
#define CY_FX_SIB_PARTITIONS (2).
.If i have increased to 4 ,it shows 4 partitions . Out of 4 partitions only two partitions data copying possible. If i have clicking other two partitions an message displays " please insert the disk".
kindly suggest how to make multiple partitions.And i need to know how to make on partitions as readable partitions.
Show LessHi,
I want to read 32 bits at a time using SPI. I'm using a GPIO pin (simple configuration) as the interrupt signal to indicate when the data is ready to be read. And using SPI register mode to read (based on the UsbSpiRegMode example). There is about a 800 micro-second delay between the GPIO interrupt end edge and the SPI SSN signal start edge. This delay is too long; it needs to be about 5 micro-seconds. Is this long delay because I'm using a register read instead of dma read? The actual read (SSN signal width) is ok -- about 3 micro-seconds. Does register read have some setup lag?
// Configure GPIO 34 as input INT_n
// interrupt line activated when profile sensor data is ready, triggered by Start_n
gpioConfig.outValue = CyTrue;
gpioConfig.inputEn = CyTrue;
gpioConfig.driveLowEn = CyFalse;
gpioConfig.driveHighEn = CyFalse;
gpioConfig.intrMode = CY_U3P_GPIO_INTR_NEG_EDGE;
status = CyU3PGpioSetSimpleConfig(GPIO_INT_N, &gpioConfig);
Thanks.
Show LessTrying to setup demo using the EZ-USB FX3 SuperSpeed Explorer to the FMC interconnect Board.
The docs seem to suggest that their exist Verilog code from Cypress for the GPIF II slave interface in the FPGA. Where can I find this verilog code?
Show LessHello
I used cyusb3014+kintex 7 and released stream_in(fpga to PC).
I want turn on led when run stream (read data from cyusb3014 by streamer) and turn of when system in idle state.
I use slavefifosync project in Eclipse, How I can determine the transmission is in progress or not?
Show LessI am working on a design with the synchronous Slave FIFO interface with the FX3 SuperSpeed Explorer Kit. However, I have problems with the latency issues.
My application sends 36-byte instructions to a 2048-byte FIFO on an FPGA; the Slave FIFO interface reads from the FX3 at 100 MHz and writes the data to the FIFO, but the FPGA reads one instruction at every clock cycle of a 0.5 MHz FPGA clock. After some processing, the FPGA sends results back with a "timestamp" of sorts based on the 0.5 MHz clock on my FPGA, so I can see when instructions are received by the FPGA. I am using the Slave FIFO interface to communicate with my host computer, which is a Wandboard Quad-Core single board computer runnign Ubuntu 14.04 with USB 2.0. connection.
I'm trying to reduce the latency of sending instructions from my host computer to the FX3 because the FPGA isn't receiving data fast enough from the FX3.. On my FX3 implementation, I have 45 2048-byte DMA buffers to be read from by the FPGA. Because of the size of instructions, I'm sending chunks of instructions together at the same time, filling up a buffer with 2016 bytes of data. However, when testing, I find that there is significant delay by 100 milliseconds when switching between DMA buffers. From the time of my last instruction at the end of one DMA buffer to the time of the first instruction at the beginning of the next DMA buffer, based on results, even though they were spaced 7 clock cycles apart, the results show that they were received 1000 cycles apart.
I'm trying to reduce the delay down to microseconds. I tried switching to a DMA AUTO configuration, changing the endpoints to be INTERRUPT endpoints rather than BULK endpoints, but I can't seem to get the latency down. I'm using LIBUSB to send data from my Wandboard using ASYNCHRONOUS data transfers, but what else can I do to reduce the latency? Am I just running into the limitations of USB 2.0 transfer? I can't increase the burst Transfer to more than 1, but what else can do to reduce the latency?
Show LessHello,
I want to trace and debug my project. As wrote in 'Programmers Manual.pdf' I need to use Segger JLink probe. Should I choose one of this tools http://www.segger.com/development-tools.html? Which tool is more suitable?
Thank you.
Show LessHi guys,
Almost finished setting up our Eclipse debug setup, however we're running into an issue during the final debug step. First off, basic specs:
-Windows 7 64-bit
-OpenOCD 0.9.0
-FX3 SDK 1.3
-WinUSB driver for Olimex ARM-USB-OCD-H
Running OpenOCD with script yields the following output:
Open On-Chip Debugger 0.9.0-rc1 (2015-04-24-22:09)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter_nsrst_delay: 200
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
jtag_ntrst_delay: 200
adapter speed: 1000 kHz
adapter speed: 1000 kHz
trst_and_srst srst_pulls_trst srst_gates_jtag trst_push_pull srst_open_drain connect_deassert_srst
RCLK - adaptive
adapter speed: 1000 kHz
Info : clock speed 1000 kHz
Info : JTAG tap: fx3.cpu tap/device found: 0x07926069 (mfg: 0x034, part: 0x7926, ver: 0x0)
Info : Embedded ICE version 6
Info : fx3.cpu: hardware has 2 breakpoint/watchpoint units
Which looks good as far as I can tell. However running gdb afterwards yields the following result:
91-gdb-set confirm off
91^done
(gdb)
92-gdb-set width 0
92^done
(gdb)
93-gdb-set height 0
93^done
(gdb)
94-interpreter-exec console echo
94^done
(gdb)
95-gdb-show prompt
95^done,value="(gdb) "
(gdb)
96 Set prompt (arm-gdb)
&"Set prompt (arm-gdb)\n"
=cmd-param-changed,param="prompt",value="(arm-gdb)"
Set prompt (arm-gdb)
96^done
(gdb)
97 target remote localhost:3333
&"target remote localhost:3333\n"
target remote localhost:3333
~"Remote debugging using localhost:3333\n"
Remote debugging using localhost:3333
=thread-group-started,id="i1",pid="42000"
=thread-created,id="1",group-id="i1"
~"0x00000000 in ?? ()\n"
0x00000000 in ?? ()
*stopped,frame={addr="0x00000000",func="??",args=[]},thread-id="1",stopped-threads="all"
97^done
(gdb)
98 monitor speed 1000
&"monitor speed 1000\n"
monitor speed 1000
@"invalid command name \"speed\"\n"
invalid command name "speed"
98^done
(gdb)
99 monitor endian little
&"monitor endian little\n"
monitor endian little
@"invalid command name \"endian\"\n"
invalid command name "endian"
99^done
(gdb)
100 set endian little
&"set endian little\n"
set endian little
~"The target is assumed to be little endian\n"
The target is assumed to be little endian
=cmd-param-changed,param="endian",value="little"
100^done
(gdb)
101 monitor reset
&"monitor reset\n"
monitor reset
@"JTAG tap: fx3.cpu tap/device found: 0x07926069 (mfg: 0x034, part: 0x7926, ver: 0x0)\n"
JTAG tap: fx3.cpu tap/device found: 0x07926069 (mfg: 0x034, part: 0x7926, ver: 0x0)
@"NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type 'help dcc'.\n"
NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type 'help dcc'.
@"NOTE! Severe performance degradation without working memory enabled.\n"
NOTE! Severe performance degradation without working memory enabled.
@"NOTE! Severe performance degradation without fast memory access enabled. Type 'help fast'.\n"
NOTE! Severe performance degradation without fast memory access enabled. Type 'help fast'.
101^done
(gdb)
102 monitor reg cpsr =0xd3
&"monitor reg cpsr =0xd3\n"
monitor reg cpsr =0xd3
@"Target not halted\n"
Target not halted
@"cpsr (/32): 0x00000000\n"
cpsr (/32): 0x00000000
102^done
(gdb)
103 monitor memU32 0xFFFFF014 =0xFFFFFFFF
&"monitor memU32 0xFFFFF014 =0xFFFFFFFF\n"
monitor memU32 0xFFFFF014 =0xFFFFFFFF
@"invalid command name \"memU32\"\n"
invalid command name "memU32"
103^done
(gdb)
104 monitor memU32 0x40000000 =0xE3A00015
&"monitor memU32 0x40000000 =0xE3A00015\n"
monitor memU32 0x40000000 =0xE3A00015
@"invalid command name \"memU32\"\n"
invalid command name "memU32"
104^done
(gdb)
105 monitor memU32 0x40000004 =0xEE090F31
&"monitor memU32 0x40000004 =0xEE090F31\n"
monitor memU32 0x40000004 =0xEE090F31
@"invalid command name \"memU32\"\n"
invalid command name "memU32"
105^done
(gdb)
106 monitor memU32 0x40000008 =0xE240024F
&"monitor memU32 0x40000008 =0xE240024F\n"
monitor memU32 0x40000008 =0xE240024F
@"invalid command name \"memU32\"\n"
invalid command name "memU32"
106^done
(gdb)
107 monitor memU32 0x4000000C =0xEE090F11
&"monitor memU32 0x4000000C =0xEE090F11\n"
monitor memU32 0x4000000C =0xEE090F11
@"invalid command name \"memU32\"\n"
invalid command name "memU32"
107^done
(gdb)
108 monitor memU32 0xE0052000 = 0x00080015
&"monitor memU32 0xE0052000 = 0x00080015\n"
monitor memU32 0xE0052000 = 0x00080015
@"invalid command name \"memU32\"\n"
invalid command name "memU32"
108^done
(gdb)
109 monitor sleep 1000
&"monitor sleep 1000\n"
monitor sleep 1000
109^done
(gdb)
110 set $pc =0x40000000
&"set $pc =0x40000000\n"
set $pc =0x40000000
110^done
(gdb)
111 si
&"si\n"
si
111^running
*running,thread-id="all"
(gdb)
@"WARNING! The target is already running. All changes GDB did to registers will be discarded! Waiting for target to halt.\n"
WARNING! The target is already running. All changes GDB did to registers will be discarded! Waiting for target to halt.
@"Halt timed out, wake up GDB.\n"
Halt timed out, wake up GDB.
~"\nProgram received signal "
Program received signal ~"SIGINT, Interrupt.\n"
SIGINT, Interrupt.
~"0x00000000 in ?? ()\n"
0x00000000 in ?? ()
*stopped,frame={addr="0x00000000",func="??",args=[]},thread-id="1",stopped-threads="all"
(gdb)
112-break-insert cyfxslfifosync.c:733
112^done,bkpt={number="1",type="breakpoint",disp="keep",enabled="y",addr="0x40003e7c",func="CyFxBillCounterStart",file="../cyfxslfifosync.c",fullname="c:\\users\\ssd\\desktop\\new files\\slavefifosync\\slavefifosync\\cyfxslfifosync.c",line="733",thread-groups=["i1"],times="0",original-location="cyfxslfifosync.c:733"}
(gdb)
113-exec-continue
113^error,msg="Warning:\nCannot insert breakpoint 1.\nError accessing memory address 0x40003e7c: (undocumented errno -1).\n"
(gdb)
114-break-insert cyfxslfifosync.c:3666
114^done,bkpt={number="2",type="breakpoint",disp="keep",enabled="y",addr="0x40009694",func="GpioInputMenualThread_Entry",file="../cyfxslfifosync.c",fullname="c:\\users\\ssd\\desktop\\new files\\slavefifosync\\slavefifosync\\cyfxslfifosync.c",line="3666",thread-groups=["i1"],times="0",original-location="cyfxslfifosync.c:3666"}
(gdb)
115-break-insert -t main
115^done,bkpt={number="3",type="breakpoint",disp="del",enabled="y",addr="0x40009a38",func="main",file="../cyfxslfifosync.c",fullname="c:\\users\\ssd\\desktop\\new files\\slavefifosync\\slavefifosync\\cyfxslfifosync.c",line="3920",thread-groups=["i1"],times="0",original-location="main"}
(gdb)
116-stack-list-frames
116^done,stack=[frame={level="0",addr="0x00000000",func="??"},frame={level="1",addr="0x00000000",func="??"}]
(gdb)
117 load
&"load\n"
load
~"Loading section .vectors, size 0x2320 lma 0x100\n"
Loading section .vectors, size 0x2320 lma 0x100
117+download,{section=".vectors",section-size="8992",total-size="761283"}
~"Loading section .text, size 0x9a70 lma 0x40003000\n"
Loading section .text, size 0x9a70 lma 0x40003000
&"Load failed\n"
117^error,msg="Load failed"
Load failed
(gdb)
I used the initialize commands as shown in the FX3 Programmers Manual. I noticed several of the initialize commands aren't found, were they deprecated or something? Any thoughts?
Show LessHi,
Can I use GPIOs at start-up as bit bashed outputs to configure a FPGA in 16-bit parallel mode then switch to using the same GPIO pins in slaveFIFO mode ?
The header file Cyu3system.h has the following note above the CyU3PDeviceConfigureIOMatrix() declaration which suggests I can do the above but any clarification would be very helpful:
"It is recommended that this function be called immediately after the CyU3PDeviceInit call from the main () function; and that the IO matrix not be dynamically changed. However, this API can be invoked when the peripherals affected are disabled."
Thanks
Dave
Show LessThe technical reference manual says "There are eight complex I/O pin groups, the elements of which are chosen in a modulo 8 fashion (complex I/O group 0: GPIO 0, 8, 16; complex I/O group 1: GPIO 1, 9, 17, and so on)" (p.53).
Using the TRM documentation it seems like they would be:
Group0: 0 8 16
Group1: 1 9 17
Group2: 2 10 18
Group3: 3 11 19
Group4: 4 12 20
Group5: 5 13 21
Group6: 6 14 22
Group7: 7 15 23
But the CyFxGpioComplexApp example configures GPIO pins 50, 51, and 52 as complex.
Which pins are in each of the 8 complex GPIO pin groups?
It is not clear to me which pins are complex in Table 7 of the FX3 datasheet, either.
Thanks.
Show LessI am triggering SPI register reads via GPIO34 but get a CY_U3P_ERROR_MUTEX_FAILURE when
CyFxSpiTransfer() -> CyU3PSpiTransmitWords() calls CyU3PSpiGetLock(). I am using the CyFxUsbSpiRegMode example as a template but controlling the SPI SSN with GPIO34.
If I manually call CyFxSpiTransfer() the spi read works fine.
SpiConfig:
spiConfig.isLsbFirst = CyFalse;
spiConfig.cpol = CyTrue;
spiConfig.ssnPol = CyFalse;
spiConfig.cpha = CyFalse;
spiConfig.leadTime = CY_U3P_SPI_SSN_LAG_LEAD_ONE_HALF_CLK;
spiConfig.lagTime = CY_U3P_SPI_SSN_LAG_LEAD_HALF_CLK;
spiConfig.ssnCtrl = CY_U3P_SPI_SSN_CTRL_HW_EACH_WORD;
spiConfig.clock = 20000000; // set clock to 20MHz //16-20MHz
spiConfig.wordLen = 32; // set word length to 32 bits
Who else uses glSpiLock?
Show Less