USB superspeed peripherals Forum Discussions
I have a problem,i use the fx3 chip,and i use the spi with the DMA mode ,i enable both transfer and receive,i want to know can i transfer and receive only one word every time?
status = CyU3PDmaChannelSetupRecvBuffer (&glSpiRxHandle, &buf_p);
CyU3PDmaChannelSetupSendBuffer (&glSpiTxHandle,&s_buf);
CyU3PSpiSetBlockXfer (1, 1);
status = CyU3PDmaChannelWaitForCompletion(&glSpiTxHandle,CY_FX_USB_SPI_TIMEOUT);
status = CyU3PDmaChannelWaitForCompletion(&glSpiTxHandle,CY_FX_USB_SPI_TIMEOUT);
CyU3PSpiDisableBlockXfer (CyTrue, CyTrue);
Hi,
I am using GPIF interface as a synchronous slave FIFO input. The transmission is initiated by the FX3 by pulsing a GPIO line. However the trigger signal must be synchronized to the GPIF clock rather than the FX3s main clock in this design. How can I ensure the IO buffer of a spare GPIF CTLx pin is still using the GPIF clock source after I override it to use it as a simple IO within the firmware?
Cheers,
Helmut
Show LessI am currently working on my bachelor thesis and i am wondering if you have any examples or tips how you can run a video stream along side a UART communication link. Our goal is to have a video stream coming into the FX3 then out to the host pc and the control channel goes both ways.
PC -> FX3 -> camera/other device
and
camera/other device -> FX3 -> PC
What i understand is that we need to use some sort of composite device to get drivers for both the comport and the video device but im not really sure how? We found fireware with drivers for the two function but they only work by them self.
I'm thankful for all help!
Regards Joel
Show LessI use the FX3 contact to a spi chip,i use the spi with the DMA mode,the external chip need that the MOSI PIN of FX3 must be high level,but when i init the spi interface of the FX3,this pin is low level in the idel state.then i use the spi with the DMA mode to transfer and receive at the same time ,and when read data from the external chip ,i transfer oxff.but when i set to transfer and receive only one word,the CyU3PDmaChannelWaitForCompletion return is eeror(CY_U3P_ERROR_NOT_STARTED) ,
status = CyU3PDmaChannelSetupRecvBuffer (&glSpiRxHandle, &buf_p);
CyU3PDmaChannelSetupSendBuffer (&glSpiTxHandle,&s_buf);
CyU3PSpiSetBlockXfer (1, 1);
status = CyU3PDmaChannelWaitForCompletion (&glSpiRxHandle,
CY_FX_USB_SPI_TIMEOUT);
if (status == CY_U3P_ERROR_NOT_STARTED)
{
//CyU3PGpioSetValue(34,CyFalse);
}
status = CyU3PDmaChannelWaitForCompletion(&glSpiTxHandle,
CY_FX_USB_SPI_TIMEOUT);
if (status != CY_U3P_SUCCESS)
{
CyU3PGpioSetValue(37,CyFalse);
}
CyU3PSpiDisableBlockXfer (CyTrue, CyTrue);
can you tell me what is the problem?
thanks very much.
Show LessI AM DEVELOPING ON THE CX3-Reference-Design-Kit.
WANT TO USE THE CX3065'S OUTPUT CLK AS IMAGE SENSOR'S MAIN CLOCK,
IS THERE ANY CODE SAMPLE FOR THIS?
Show LessIn USRP:
In order to compile the USRP B200 and B210 firmware, you will need the FX3 SDK
distributed by the FX3 manufacturer, Cypress Semiconductor. You can download the
[FX3 SDK from here](http://www.cypress.com/?rID=57990).
*Note*: You *must* use SDK version 1.2.3!
Once you have downloaded it, extract the ARM cross-compiler from the tarball
`ARM_GCC.tar.gz` and put it somewhere useful. The highest level directory you
need is `arm-2013.03/`.
Q:
I can get SDK version1.2.3,but I cannot get ARM_GCC.tar.gz for this version,where can i get the ARM_GCC?
Show LessHello,
i am trying to learn to setup GPIF2. I have created a GPIF2 design with the following properties:
- Master / Synchronous / Internal / 8 Bit Bus / no multiplexing / 1 input / 1 output / 2 DMA flag lines
- I have a state machine with 3 states:
-- Start state
-- STATE0: Which should set OUTPUT0 to e.g. 0
-- STATE1: Which should set OUTPUT0 to e.g. 1
Then i have 2 transitions: from STATE0 to STATE1 when INPUT0 is set and back when INPUT0 is reset (polarity does not matter at the moment).
I have attached screen shots of my design and state machine to this posting.
A) I expect that when i toggle INPUT0, then i see some reaction on OUTPUT0, but OUTPUT0 always remains 0.
B) I also expect that GPIO16 (CLK) is an output, but value is Z.
C) GPIO[0...7] is also Z, but perhaps this is correct?
D) GPIO[8...15] is 0, perhaps correct, because no used (more assumed it is Z)?
E) I also tried first without a state machine at all, changing "initial value" between high and low (of course re-compling and re-flashing), but no reaction. Therefore i am not sure, if i control the state machine at all?
This i my code to load and start GPIF (i get no error output, especially from these function, but of course other debug output):
CyU3PPibClock_t pibClock;
/* Initialize the p-port block. */
pibClock.clkDiv = 2;
pibClock.clkSrc = CY_U3P_SYS_CLK;
pibClock.isHalfDiv = CyFalse;
/* Disable DLL for sync GPIF */
pibClock.isDllEnable = CyFalse;
apiRetStatus = CyU3PPibInit(CyTrue, &pibClock);
if (apiRetStatus != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "P-port Initialization failed, Error Code = %d\n",apiRetStatus);
CyFxAppErrorHandler(apiRetStatus);
}
/* Load the GPIF configuration for Slave FIFO sync mode. */
apiRetStatus = CyU3PGpifLoad (&CyFxGpifConfig);
if (apiRetStatus != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "CyU3PGpifLoad failed, Error Code = %d\n",apiRetStatus);
CyFxAppErrorHandler(apiRetStatus);
}
/* Start the state machine. */
apiRetStatus = CyU3PGpifSMStart (START, ALPHA_START);
if (apiRetStatus != CY_U3P_SUCCESS)
{
CyU3PDebugPrint (4, "CyU3PGpifSMStart failed, Error Code = %d\n",apiRetStatus);
if(apiRetStatus == CY_U3P_ERROR_NOT_CONFIGURED) CyU3PDebugPrint (4, "-> CY_U3P_ERROR_NOT_CONFIGURED)\n");
if(apiRetStatus == CY_U3P_ERROR_ALREADY_STARTED) CyU3PDebugPrint (4, "-> CY_U3P_ERROR_ALREADY_STARTED)\n");
CyFxAppErrorHandler(apiRetStatus);
}
Have i missed something to enable GPIF? There is "isDQ32Bit", what value must it get when using 8 bit?
I have it on CyFalse, because i have not 32 bit interface.
Hello,
My situation: custom FX3 design with boot library, internal core power (not from USB).
I have configured 2 USB bulk endpoints and 2 PPorts (to an FPGA), everything over auto DMA channels. Starting point was the "gpiftousb" example. It is basically in an auto forwarding only mode: EP2 : USB -> FPGA; EP86: FPGA -> USB. Everything works as expected on first enumeration.
I have problems AFTER USB3 cable is disconnected/reconnected. Just to make it clear: all problems below happen only with SS, everything works correctly on HS!
1. From host POV, everything is good; re-enumeration, device is visible in device manager.
2. There is no (disconnect) event visible in UsbEventCallback when removing the cable, why? I don't really need it, but it might be a hint. Additionally, when disconnected the function "CyFx3BootUsbGetSpeed" (polled in the main loop) still returns CY_FX3_BOOT_SUPER_SPEED !?
3. After re-connect, no data sent from host (over bulk EP) reaches the DMA!? I enabled a interrupt callback on DMA transfer just to print a message, and it doesn't trigger it.
I have tried everything I could think of:
- a simple vendor command re-initializes everything (DMA, GPIF, etc)
- I bought the SuperSpeed Explorer Kit and modified the power circuit to match my situation; the same problem (I just look for the DMA callback message).
- (re)connecting to USB2 cable works immediately, USB3 still shows the problem. This hints towards the USB3 handling.
- I found that the problem occurs only after first bulk transfer from host. Before doing any transfer, I can disconnect and reconnect several times; the first transfers will work correctly. This hints towards DMA buffer issues, but I did not find any DMA reset other than disabling / enabling it again...
The whole issue seems to be some kind of initialization issue in the boot library.
I am thankfull for any other hints / ideas.
Regards,
Gabriel
The ARM GCC B236 installer package appears to be broken within the FX3_SDK_Windows_v1.3.3.exe self extractor. Is it just me, facing the issue ? The update manager downloads the ARM_GCC_B236 package, but that also seems broken. An updated package of ARM_GCC_B236.exe is available ? Any thoughts ?
Thanks
Show LessI create a fpga design to write data to fx3 based on AN65974 (Slave fifo).
IN my Firmware, I use the function as follows- CyU3PGpifSocketConfigure(0, CY_FX_PRODUCER_PPORT_SOCKET, 6, CyFalse, 1);meawhile flagA have been configured as DMA_ready , flagB be configured as DMA_watermark.
I am able to transfer for a very short amount of time before Flag B remains Low = Buffer Full. oscilloscope both flags go low when the buffer is full but only flag A goes back up to show that the buffer is Not Full. Why does the signal not go back up?
I also used this implementation- CyU3PGpifSocketConfigure(0, CY_FX_PRODUCER_PPORT_SOCKET, 0, CyFalse, 0);When changing the watermark value from 6 to 0 I had no issues and flag B matched up with flag A .
Thanks!
Show Less