USB superspeed peripherals Forum Discussions
Hi,
My situation: When I assert 2 signals at zero I remove the VBUS USB power to the FX3 device and I call the CyU3PSysEnterSuspendMode function to put it in low power mode. When I assert either or both the signals at one I assert the VBUS to the FX3, used as wakeup source from suspend state, and I perform a cold reset via the CyU3PDeviceReset function.
Now, the first run is ok (I connect my system to the PC via USB port, used to power the whole board, I assert to zero the 2 signals, the FX3 goes in power down and when I change the state of either or both the signal it exits from suspend and perform correctly the reset), but the second is always wrong (the FX3 goes in power down and doesn't exit from the CyU3PSysEnterSuspendMode function).
What could be the problems?
I've already try to flush and reset the memory associated with endpoints (and re-enumerate the device).
Thanks.
Show LessHello,
I'm evaluating CYUSB3610 for some test equipments. From Cypress web site, component is in 'sampling' status. It is available in the open market?
Thanks,
Show LessHi,
I would like to know if we can use a hub with a fx3 and how to communicate with each USB device if it is the case, do I need to create software threads?
Regards,
Laurent
Show LessHi
I use the U7243B USB Test App of Keysight to make a compliance test on CYUSB3014-BZXC of my board,
and the Oscilloscope cannnot get any wave form from CYUSB3014 during Device Tx test.
Since I have tried the compliance test on a usb flash drive(mass storage disk) and the result is ok,
I guess the problem is about the setting of CYUSB3014.
What should I do to make the CYUSB3014 be ready for the compliance test?
Should I change the Firmware or do something through FPGA?
Here is the information about the CYUSB3014 on my board:
1. The firmware is SlaveFifoSync
2. The Slave FIFO Interface(GPIF II) is connected to FPGA(Altera)
Here is the step I make the Device Tx compliance test:
1.Setup the board and download the firmware to CYUSB3014
2.Connect the USB connector of board to the test fixture(of keysight), the picture is upload
3.Run the Tx test software(U7243B of keysight)
4.Disconnect the test fixture and reset the CYUSB3014(as the software requires)
5.download the firmware to CYUSB3014 and connect the test fixture and the wait for valid wave form
Then the Oscilloscope cannnot get any wave form.
By the way, I also tried to control the FPGA to send data to device,the result is same.
Looking forward to your reply.
Best regards,
Wuyue
Hi All,
I try to create an automatic DMA channel with SPI as the consumer. This is how I go about doing this:
CyU3PMemSet((uint8_t *)&dmaConfig, 0, sizeof(dmaConfig)); dmaConfig.size = pageLen; dmaConfig.count = 0; dmaConfig.prodAvailCount = 0; dmaConfig.dmaMode = CY_U3P_DMA_MODE_BYTE; dmaConfig.prodHeader = 0; dmaConfig.prodFooter = 0; dmaConfig.consHeader = 0; dmaConfig.notification = 0; dmaConfig.cb = NULL; /* Channel to write to SPI flash. */ dmaConfig.prodSckId = CY_U3P_UIB_SOCKET_PROD_1; dmaConfig.consSckId = CY_U3P_LPP_SOCKET_SPI_CONS; status = CyU3PDmaChannelCreate( &glSpiTxHandle, CY_U3P_DMA_TYPE_AUTO, &dmaConfig );
The execution of CyU3PDmaChannelCreate is not succesful.
If CY_U3P_UIB_SOCKET_PROD_1 is replaced with CY_U3P_CPU_SOCKET_PROD and CY_U3P_DMA_TYPE_AUTO is replaced with CY_U3P_DMA_TYPE_MANUAL_OUT then the function succeeds.
Do you understand what I am doing wrong?
Show Less
This is with reference to the UVC_AN75779 application note(implementing an image sensor using Cypress FX3).
The sensor board eventually pass SYNC and Clock information to the GPIO pins on the FX3 board. Specifically, the application note is written for MT9M114 sensor.
Does anyone know what the timing specs for this interface are?
Specifically, what are the Vertical and Horizontal Syncs and Blanking Periods(in terms of number of clock cycles). Also, what is the clock frequency(PIXCLK) for which this application note is configured for.
Show LessHello 🙂
There is only one jtag on my board. And my firmware doesn't work correctly. Could I use a jtag adapter to debug the firmware? And I have a xilinx jtag adapter. Does it work with FX3S?
I doesn't find the manual about how to use a jtag adpater to debug with fx3s. Could someone give me a link about how to use the jtag adpater.
Thanks a lot.
Show LessHello,
I have two fx3 in communication in GPIF port.
One is in master state machine, base on master given on GPIF designer and we had a third thread.
the other on slave state machine. identically to sync slave fifo 2bit
FX3 master has 2 threads which push data to FX3 slave reading Thread (only one thread).
FX3 master thread configuration: - dma channel thread 2 : CPU -> PPORT (consumer) in manual out. buffer size 512, buffer count 16.
- dma channel thread 1 : USB -> PPORT (consumer) auto chanel. buffer size 1024, buffer count 8.
- dma channel thread 0 : PPORT (producer) -> CPU manual in. buffer size 512, buffer count 16.
FX3 slave thread configuration : - dma channel thread 0 : PPORT (producer) -> CPUbuffer size 1024 , count 3 CPU -> USB (manual), buffer size 1024 , count 4.
- dma channel thread 1: USB -> PPORT (consumer) auto, buffer size 512, count 8.
What I want to do is sending data from master to slave FX3.
FX3 master threads 1 and 2 send data to FX3 slave thread 0.
THREAD 1-----|
FX3 master | ------> THREAD 0 FX3 slave
THREAD 2 ----|
I can actually make only working one by one but not both at the same time.
My state machine give the priority to thread 1. :: IDLE -> THREAD1 -> THREAD2 -> goback to IDLE
So does any body aware on threading in GPIF Port to help me please?
Show LessHi everyone,
I faced a problem as blow:
if record_size = 1024*512*2048 (1GByte) and img_buffer_record = (UCHAR *)calloc(record_size, 1);
pContext = pBulkEpIn->BeginDataXfer(img_buffer_record, record_size, &oRdOvLap)
this transfer works well.
if change the record_size to 1024*512*4096 (2GByte), the BeginDataXfer will crash, which means the max single transfer size of BeginDataXfer is 1GByte.
But in my project , I hope the single transfer size is as large as possible.
So is there any solution to enlarge the package size?
thank you all.!!!
Show LessHi:
I have several problems about FX3, when I use the usb3014 transfer data with FPGA. I use the sync slave fifo mode to communicate with the FPGA , problems as following:
First, transfer data from PC to FPGA. When the clk of FPGA lower than 80MHz ,the data will be stopped to transfer.But when I click the rest of FPGA it will be continue to transfer.
Second, data from FPGA to PC. When the clk of FPGA higher than 70MHz, the access of transfer will be stoped.Then I must to restart the power the device.
The last one,it is also the must important one.Once I find when the transfer stopped ,the endpoints(in/out) of the USB device will be dropped. It looks like the user didn't download the firmware.
Does anyone ever meet this issue ?Is there any explanation to that ?
Thanks for any returns
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