USB superspeed peripherals Forum Discussions
Hello.
I am trying to configure SPI DMA auto channel. My question is:
CyU3PSpiSetBlockXfer function must be called before DMA channel will be created using CyU3PDmaChannelCreate method? Or I can to use this method after DMA channel is created?
Show LessHi.
I will make new custom board using fx3 chip. and I want to UART port, but useable board area is too small to insert UART chip,
example codes that I received from Cypress Inc, have included USB UART(PID 0x0008) and USB bulk system(PID 0x00F0).
Should I use two or more PID in same a Fx3 chip ? If it is possible I want to know how to use that.
Regards.
Shin.
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I'm using the MT9D131 OnSemiconductor camera with the UVC_AN75779 example, and it's working fine.
But I think I've found and error in a certain mode of operation. I'm working on Linux platform and I'm using v4l2-gtl to get frames. The error happens when I only get 1 frame:
v4l2-ctl --device /dev/video0 --stream-mmap --stream-to=frame.yuv --stream-count=1
And I get this error:
streamingStarted == CyFalse -> Clear feature request detected..
Error in CyU3PDmaMultiChannelCommitBuffer: code 71
SUSPEND encountered...
But I've realised, that If I take a new image works fine without an error
streamingStarted == CyTrue -> Clear feature request detected..
Clear feature request detected.
SUSPEND encountered...
When I take an image the first time I haven't got any error so the odd captures work fine but the even captures I don't know why I've got this error:
streamingStarted == CyFalse -> Clear feature request detected..
Error in CyU3PDmaMultiChannelCommitBuffer: code 71
SUSPEND encountered...
Hi
I am using 16 bits SlaveFIFO on FX3, PCLK is operate at 100MHz
sending data from FPGA via FX3 to PC
FLAGA is setted as current_thread_full
FLAGB is setted as current_thread_partial_full
While I monitor FLAGA only, data losses during transmittion. Currently, FLAGB operates normally.
After searching the comments on Forum.
I "ANDed" FLAGA and FLAGB inside FPGA then monitor this signal. But something strange happened...
FLAGB always keep low, no matter how many times I ask data from FX3
Do you guys have any experience or comment on it??
Sorry for the bad image quality, that's all I can get..
Thank you so much for helping!!
Show LessThe ISO example "cyfxuac" (as MIC, send SPI WAV content via USB) does not work (on Windows 10):
it enumerates quite properly (with errors in descriptors) - the audio recording device is there, but
there is NOT any ISO transmission of audio packets.
There are some issues in descriptor - but even fixing it - no ISO packet transmissions:
a) "Maxpacket size for EP0:" should be 64 (0x40 for high-speed device) instead of 0x09
(it is not a power of 2, as 2 power 9, it should be the number in bytes, the comment is misleading,
bMaxPacketSize for EP0 can be only: 8, 16, 32 64 - not 9)
b) OK, 96 bytes a bInterval = 0x03 = 500 micro-sec. (makes sense, even I would assume 192 bytes every 1 ms)
but with USB 2.0 the alternative descriptor sets 192 bytes with 125 micro-second interval. Why? (cannot be right)
(should it be 192 bytes every 1 ms interval, and bInterval for USB 2 should be always set to 1?)
If I understand the comment: 4 frames with 96 bytes, every 4 microframes - for 48 KHz, 2x16bit it would be just 2 frames,
but the bInterval is set for 4 micro-frames (does not seem to match).
How to make this example working?
BTW: instead of reading from SPI flash - how to flash a WAV file into it? (as a WAVFile.img and control center?)
I fill the spiBuffer with samples of a sine period. But Windows 10 does not get any ISO packet, there is no audio in.
Using USBlyzer shows me also that no ISO packets are sent.
Best regards
Torsten
Hi,
I designed a board using FX3 Peripheral Controller.
I wanted to use a flash SPI to boot and use UART at the same time.
When I made the schematic, I used this file in order to choose which pins I would be using : http://www.cypress.com/file/140296/download
I saw that the "16 - bit Data Bus + UART+SPI+I2S" case would fit my design because I'd like to use UART for debugging and SPI for SPI Boot (for the FX3). And I would like to add I2S to my design in the future.
I then received my custom board and I decided to use the cyfxusbuart example (located at Cypress_installation_folder\EZ-USB FX3 SDK\1.3\firmware\serialif_examples\cyfxusbuart). But when I program my board, it appears that the pinout is not the one described in the upper document (the "16 - bit Data Bus + UART+SPI+I2S" pinout). Actually, the pinout probably is the "16 - bit DataBus +UART+GPIO" because I can see the TX and RX on a scope when I probe GPIO[55] and GPIO[56] pins.
Even if the SPI interface is only used during boot, I'd like to have separate lines for each signal from each interface, I don't want to have both interfaces crossed. Because the things that are using UART will see some weird stuff during SPI boot/programming.
I cannot change by board layout because it's a PCB so the pin mapping of the program running on FX3 has to be just like the "16 - bit Data Bus + UART+SPI+I2S".
Can somebody please tell me how to change the program pinout ?
Show LessI want to use GPIOs (Interrupts) which would also generate an USB message.
The GPIO examples in KIT-003 sample file are without any USB connectivity (just for internal ARM9, OK so far).
I am not an expert on USB. Would it be possible to generate an USB message (from device to host) when a GPIO was triggered,
the ARM9 has handled a GPIO Interrupt?
Or is it necessary to poll the status via USB? Host has to request the status of GPIO, peridocially?
Or could I send an asynchronous, unsolicited USB message to inform host that GPIO (something) is available to be drained?
Is there an example how to use GPIOs (Read and Write) via USB plus ARM9 where it would do something on GPIO trigger (e.g. generate the USB packet to be sent to host or prepared to be drained later by host (when "polling")?
Thank you and best regards
Torsten
Hallo, is there any working example of super speed data transfer between the DVK v2 board and a window 7 host?
We just received our DVK but none of the examples in the SDK seems to exploit the super speed capability of the FX3.
We would really appreciate if anybody could tell us if the bulkloop, the streaming… or whatever else example in the SDK is really working in super speed mode. If this is the case we could focus un identifying somewhere else the problem.
If the answer to the above question is yes… what is the achieved transfer bandwidth ?
Tanks, Joel
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