USB superspeed peripherals Forum Discussions
Hello,
We have tried installing EZ USB Suite on Windows 10. The installation went fine and we performed the licensing however we can't create a new project or open an existing project. Eclipse IDE shows these sections inactive.
Attached is a screenshot of the problem.
Can you please guide us about the problem.
Best Regards
rifo
Show LessHello everyone!
I have program that communicate with device via USB2.0 using ezusb.sys driver. I have CYUSB3KIT and I want program (by changing VID/PID) to think that CYUSB3KIT is the device.
Can I use ezusb.sys driver instead CyUSB3.sys driver for handle with EZ-USB FX3 in usb2.0 mode?
Regards, Yuri
Show Lesshello,everyone,
The GPIF only can be configured 8/16/24/32,I wonder if I have 12 bit data,and GPIF configure 16 bit,when I use GPIF transfer the data ,is more 4 bit data 0 or 1 or Z? And I want to know how to configure the GPIF ctl[0:15]?
regards,thank you !
Show LessHi,
I am following the below sequence for sending data from CPU to an USB consumer endpoint.
step 1: Get an empty buffer using CyU3PDmaChannelGetBuffer
step 2: Copy data to be sent to the buffer acquired in step 1.
step 3: Commit the buffer.
The data to be sent is not constant in my usecase, which means I cant preset the data to be committed as in the function CyFxBulkSrcSinkFillInBuffers used in example code cyfxbulksrcsink.c. (The data in that example is a preset pattern 0xAA).
1) The copy operation (Step 2) is handled by CPU or DMA?
2) To commit the data towards a consumer endpoint, we need to do a copy (CyU3PMemCopy) to the buffer acquired irrespective of DMA with callback or without callback?
3) Can I run an AUTO DMA with signal, from SPI to USB consumer endpoint? Thus, when a host application reads from the USB, it gets the SPI data continuously.
Show LessHi, everyone
Now I'm testing "SUPERSPEED EXPLORER KIT", if I click "Transfer Data-IN" in "Control Center", "BULK IN transfer failed with Error Code:997" will be printed. However,"Transfer Data-OUT" is normal
"Bulk Loop" can not read any data even Bytes have been transfered out.
I also tried demos in Ubuntu & Win10, result is same.
is there configuration I didn't do? or my board is broken?
Show LessHi,
I have some problems with the GPIF-II when implementing a synchronous slave FIFO interface.
Based on the AN65974 example project I created a firmware for my application. I use auto DMA channels for the data transfer to and from the GPIF. The interface to the FPGA is 32-bit wide, and I use the same flags as in the example.
The first problem I have is that I run into timing problems when applying a higher clock speed than 60MHz.
From my understanding I should be able to read a valid data word two clock cycles after setting SLRD and SLOE to low, no matter the clock speed. However, when I operate at higher clock rates there seems to be an additional delay cycle before I can read the correct data. Moreover, when writing data back to the GPIF it seems to sometimes skip a word. Did anyone else notice such a behaviour or does someone have an idea what might cause that?
The second, and bigger, problem I have is about the I/O voltage level. I got the interface running at 60MHz with the I/O voltage set to 3.3V. I use the FMC interconnect board to connect the FX3 board to the FPGA board. As long as the I/O pins of the FPGA are configured as LVCMOS33 everything works fine. It even works when I disconnect J2 on the FX3 board to set the I/O pins of the FX3 board to 1.8V. However, when I configure the I/O pins of the FPGA as LVCMOS18 the GPIF stops working. The problem now is, that the FPGA board that I have to use for the final design only supports LVCMOS18 at it's FMC I/Os. Does anyone know about this problem and has a possible solution?
To add some information: I also noticed, that I'm unable to measure a signal from the GPIF pins unless I connect it to the FMC connector of the FPGA board (afterwards I'm able to measure a signal, even when I disconnect it again). When I set a flag to be high by default then I can measure that signal, but the state machine of the GPIF does not seem to work at all. On the other hand, I use two GPIOs (26 and 27) for two special reset signals that I set in the firmware directly, depending on special vendor commands. These signals behave normally, even when the I/Os from the FPGA are set to 1.8V.
I would appreciate any help I can get, so thanks in advance.
Regards,
Max
hello,I compile the bulkloopauto program follow the AN75705 datasheet.But when I conpile the project,it shows
Type 'uint8_t' could not be resolved ,but when I download the program to the board,it can work,why?
thank you !
Show Lesshi,
I have a question about EZ USB FX3 .Now I have a 10 Ms/s,12 Bit ADC,which has four channels,and the data is 13 bit,including 1 bit clock.Now I want to use the Fx3 to transfer the data to PC via the usb3.0 by time division multiple access. So,I want to know how to connect the FX3 board with my ADC? Or I can take a photo with my connection. I wonder if you can help me check with it. Thank you !
regards,
Alex
Show LessHi all,
We have noticed that FX3 PHY errors count is in strong correlation with activity on GPIF interface. Until data is handled inside FX3, typically errors count stays 0. But if FX3 itself or external FPGA starts to output data to GPIF bus, PHY errors appear.
The actual errors rate depends on host chipset type, USB cable length, GPIF interface voltage, etc. Definitely the host plays significant role here - I have a PC with Intel USB chipset on motherboard where the tests can run weeks without any PHY error (if I use short cable and plug the device into right port).
But most important - with appearing PHY errors most probably sooner or later the SuperSpeed communication fails.
According our experience, also FX3 clock signal quality has significant impact on errors count. You have to keep clock traces on PCB as short as possible (do not even think to clock two chips with same clock!). Otherwise the effect is similar - PHY errors and communication failure.
Next is an excerpt from Cypress tech support response:
>>>
These errors are not part-part dependent, but channel, activity or noise dependent. A noisy set up will produce more of these errors compared to a quiet or less-noisy set up. More activity in the chip may lead to more noise and more of such errors. However, the layers of the communication protocol (USB) are designed to recover from such dynamic errors. IO toggling results in substrate noise. If you see there are 1336 PHY errors with 3.3V IO supply, 42 PHY errors with 1.8V IO supply. Lowering the supply voltage reduces the substrate noise.
<<<
I definitely agree with tech support. Few PHY errors can be considered natural at SuperSpeed rates. And USB protocol should recover from such errors. But my concern is that in practise USB communication with FX3 fails. Even with perfect host, if you lengthen the cable a bit so that PHY errors start to appear, also the communication starts to fail. I.e. in practise it does not recover from (FX3) PHY errors.
dreitz posted in "SuperSpeed interoperability with USB 3.0 controllers" topic:
>>>
We are using a LeCroy AdvisorT3 to look at the USB 3.0. We are seeing what they call Interpacket Symbols - IPS, but we never see any bad CRCs or other data. It only shows Unknown Packets as a problem. It's like the FX3 starts spewing garbage.
When using our device and the data coming from the GPIF interface, it fails. When we use our device and the USBBulkLoopAuto sample application, we do not see the garbage.
<<<
Taking all above into account, I start to doubt that FX3 itself fails USB communication due to its internal noise issues.
I attached a test for exploring the issue with Cypress FX3 DVK Device board (CYUSB3KIT-001).
Test itself is quite simple - host sends 32-bit toggling (0x00000000/0xFFFFFFFF) data to FX3 and FX3 GPIF automata outputs this data to its pins, causing pins to toggle as well.
FX3 software is built by modifying Cypress Synchronous Slave FIFO (slfifosync) example. The original GPIF state machine is replaced with new one and a Device Vendor Request is implemented for querying FX3 error counters.
Designed GPIF state machine outputs all the host sent data to GPIF pins automatically, without any external control. Plus, it fills automatically IN pipe buffers for sending to host. As there is no external GPIF clock then the automata is modified to use FX3 internal clock. GPIF II project files are located in "FX3device\GPIF II" directory.
The most of FX3 source modifications are placed between EXPLORE_GPIF_NOISE defines. Source files are in FX3device subdirectory.
Three Windows command line utilities are supplied:
1) FX3USBwrite - sends toggling data to FX3 OUT bulk pipe 0x01.
2) FX3USBread - can be used for reading data from FX3 IN bulk pipe 0x81.
3) FX3USBerrors - reads FX3 PHY and LINK errors via Control Pipe 0.
Utilities source codes are in relevant directories.
Testing scenario:
1) On FX3 board, set VIO1..VIO5 to 3.3V (higher bank voltage causes more errors).
2) Load FX3GPIFNoise.img to FX3.
3) Run FX3USBerrors from command prompt with option "-clear".
FX3USBerrors -clear
This reads FX3 error counters and resets them to 0.
4) Read errors with FX3USBerrors several times without "-clear" option. Hopefully error counters stay 0.
5) Start sending data to FX3 by launching FX3USBwrite.
6) Read errors. Hopefully you will see errors appearing. Few errors per tens of minutes should guarantee USB failure. Leave FX3USBwrite running. After few minutes...days it will exit with error - USB communication has failed.
7) Optionally you can launch FX3USBread concurrently as well, this may increase the probability of USB failure.
If there are no errors, try to lengthen the cable or plug FX3 into another USB port. For example, if your PC has USB3.0 ports also at front, try these.
You can also test FX3 with quiet GPIF. For that send constant data 0 to FX3 with command
FX3USBwrite -data=0
I expect that error counters remain 0, or at least there are significantly less errors.
Note about Etron chipset/driver. Etron and FX3 just do not cooperate. USB Control Transfers fail randomly at heavy USB throughput and therefore FX3USBerrors may exit immediately with error code 31. Just retry (of course, if FX3USBwrite still runs).
Please, test your FX3 and host and give feedback. Especially if you have a set that works reliably with PHY errors. I have 4 different hosts and 2 Cypress FX3 DVK REV3 kits (+ several our own designed prototypes), but no one combination survives FX3 PHY errors.
Thanks,
kalev
Show LessHello,
I got two questions about the FX3 GPIOs.
What should I do with unused GPIO pins in my design ? Should I leave it floating ?
My second question is about the 22Ohms resistor. In the datasheet it is said that a 22Ohm should be connected to any pin driven by the GPIFII interface. I thought that any other pin should not be connected to that resistor but I saw in the Superspeed explorer kit schematics that a 22Ohm resistor is also connected to the UART and SPI pins. What should I do ?
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