USB superspeed peripherals Forum Discussions
Hi,
I receieved FX3 Dev board. I see that it has CY7C65215 USB Serial Dual chip which is supposed to be used as a JTAG debugger. Over the USB3.0, I am able to flash firmware etc, so all is happy with my dev board. When I connect to USB serial, it shows up appropriately on COM port.
I am following instructions from the help manual to launch the debugger. The board is in bootloader mode. However when I start the JLINK GDB server, it is not able to detect the USB Emulator. Is this the right interpretation? Can I do OpenOCD style USB JTAG debugging or do I need a SEGGER to actually connect to JTAG pins on the FX3 board? I don't know if JTAG pins are available either...
Can you please help me understand this better?
- Sushant
Show LessGreetings
I am clearly missing something, but I cannot find this document, "GX3 EEPROM Programming Guide", that is referenced in the datasheet and every other document, anywhere.
I would be glad for someone to please point me where does it live.
Thanks
Igor K.
Show LessWe are trying to bring-up a board with FX3. Unfortunately, we are unable to get any response from FX3 over USB port. Ideally we will upload our firmware over USB but when we plug USB cable we see nothing on the other hand of the cable. We at least expect a new USB device found message from the USB bus assuming USB 2.0 should work out of the box. FX3 is completely dead. We double checked mode pins and all related functionality. Can anyone shed some light about what is missing on our design? I'm attaching related schematics to the message.
Thanks in advance,
Caglar
Show LessIn our custom implementation of the FX3 chip, we are using it as a device. We have VBATT connected to 3.3V through a 0 ohm resistor, and the VBUS pin connected to the voltage line of the USB connector through an overvoltage protection in a similar manner to the dev board. The documentation states that when both are connected, the VBUS line is used by defatult.
My first question is, if the VBUS line loses power, will the chip switch to the VBATT for power?
Second question is, what happens to the internal operation of the chip if VBUS is power cycled? Is anything reset? We have all other I/O and core voltages powered internally.
Thanks
Show LessI have generated the state machine for our own 8-bit camera with FV and LV and PCLK (at 29.5MHz). The camera is 640x480 at 25fps.
I have changed cyfxuvcdscr.c and uvc.c (for the SS USB3) accordingly.
a) I have to use 0x10 rather than 0x08 for bits per pixel otherwise the camera application fails.
b) I only get CPU interrupts when SCK1 is Partially filled when !FV occurs. All the other states don't appear to generate an interrupt.
Any assistance please?
I have uploaded my GPIF-II folder and AN75779 (modified) folder
Show LessI can't seem to install the FX3 driver to allow the YUY2 video stream to be used. It appears to default to the windows usbvideo.sys. As such I think some of the UVC descriptors are not being interpreted correctly (see snapshot below of USBView). It should be set up for 768x576 9fps.
Any help in removing the Microsoft driver and installing the Cypress one?
Show Less应用环境:USB3.0通信
使用方式:我们将cypress提供的SDK进行封装处理,在整个应用中我们使用了控制传输,同时并发使用批量传输。
故障现象:当host主机cpu占用井喷式增长时,会导致瞬间USB3.0输出吞吐不足,引起底层饥饿。
疑问:1. host -sdk使用时怎么才能有效的避免因操作系统环境多任务的切换带来的开销影响批量传输拷贝速率
2. host-sdk提供是否可以使用DMA的方式向USB控制传输端口写入数据,避免cpu的竞争引起拷贝内存不实时。
3. host-sdk是否提供window7环境下DMA例程可供参考
Application Environment: USB super speed
We will provide the SDK for cypress encapsulation processing, we use the control transfer in the whole application, concurrent use of mass transfer
Fault Description:
When the host CPU blowout growth, will lead to instantly see output throughput is insufficient, causes the underlying hunger
Question:
1. How to effectively avoid when using multiple tasks by operating system environment impact the cost of switching copy mass transfer rate when using because operating system environment, how can effectively avoid multitasking switching cost impact mass transfer rate of copy
2. Whether can provide using DMA way to write data to the USB port control transmission, avoid competition cause copy memory real-time CPU.
3. Whether to provide DMA Windows 7 environment routines for reference?
Show Lesshello,everyone,
I have a question about GPIF II, on the left interface configuration ,there is signal configuration ,I think it is data configuration which shows in GPIF is DQ[0:15],how to configure the control signals which shows in GPIF is ctl[0:15],in addition,how to configure the interface with corresponding interface in FX3,for example,I find the PCLK in SCH is 35 of GPIF J6,but when I read previous forum,why someone said the PCLK is GPIO 16?
Please help me ,the very first time use GPIF,
thanks,
regards.
Show Less