USB superspeed peripherals Forum Discussions
Hello,
I'm developing a camera driver with the CX3. I can send and receive messages via UART. My goal is to perform the operations I have done in UART communication over the Serial COM Port. I can view the debug messages via COM Port. However, I can't send or receive messages. I wanted to do something with the information I examined from "cyfxbulklpmaninout" example by opening a 2nd DMA channel, but when I open a 2nd DMA channel, an error occurs while configuring the camera and the camera image disappears. Anyone have any suggestions?
Show LessHello,
we are having issues with our FX3 based hardware under WIndows when we use USB2 cables or ports.
When we connect the hardware sometimes the device enumeration fails and Windows says it could not recognize the USB device. Once in this state unplugging and reconnecting does not help with a USB2 cable and will give the same error message. Only resetting the hardware or switching to a USB3 cable and port helps.
We don't see that problem when we use USB3 cables on USB3 ports at all. Also some PCs show the problem more often than others.
I tested it with our own PCB and your GpifToUsb example project and also with a slightly modified explorer kit hardware. Since the explorer kit is originally bus powered and was being reset everytime I unplugged the USB cable, I was not able to see the problem so easily. I connected only the FX3's VBUS pin to the VBUS pin of the USB port and powered the board with a 5V external supply. This allowed me also to get some debug output from the explorer kit that shows a different number of CY_U3P_USB_EVENT_RESET events when enumeration works (1-2 times) than when it fails (4 times).
Do you have an idea how to fix this problem? Is there maybe a timeout I run into, when using USB2, that I can increase in the firmware?
Attached is some random debug output, when I was playing around with the USB2 and USB3 connections. The error always happened when there are four CY_U3P_USB_EVENT_RESET. As mentioned before, this only recovered when switching to a USB3 connection or after a reset.
Thanks in advance,
Raschid
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Hello, Does the CYUSB3014 support W25Q128JVSIQ? Our project use this flash, but when we program the spi flash, it failed, we remount a W25Q32J flash, works well, so 3014 doesn't support W25Q128?
Show LessI want to use the DATA counter in GPIF to track a value between 0 and 1. Whenever I increase the count, I want it to flip (i.e. if DATA is 0, on DATA_COUNT I want it to go to 1 and vice versa). However I am unsure how to set this up in the LD_DATA_COUNT interface. Some questions:
1. Is the limit value inclusive or exclusive? If I want to include values 0 and 1, should the limit be set to 1 or 2?
2. When exactly does the counter reset if I check "Reload counter on reaching limit"? In my state machine I will not be constantly switching to the state that initializes the counter to 0 so I believe I want this on. If I have this option checked with limit set to 1, will the counter reset when it increases to 1 (therefore never actually reaching it) or when it increments past the limit? Does this take 1 cycle?
Thanks
Show LessHi everyone!
I'm having issues making example AN65974 work on a custom board I've made. All the connection between the Cypress FX3 and the FPGA are ok, I've checked multiple time. Here's the issue:
I'm using the stock code on the fpga and cypress (I added a few GPIO on this one to control FPGA start up) from the example. The firmware on the cypress fx3 is configured to be 16bits (as is the gpif ii interface). I'm able to make the make the loopback mode work with the bulkloop application from the sdk. I receive and send all the message without any problem with this example. The problems begin when I try to make it work with the stream in mode. I, of course, change the define and recompile the fx3 firmware for stream in out mode, and after that boot my board and after that the streamer application. The streamer application sees my endpoint but when I try to start nothing goes through. The fpga is also stuck with the flag_b stuck at 0 and never coming back up. I've put a screenshot of the ila probe on my fpga at startup and we can see that the fpga send the first message but is stuck after that because the flag_b never goes up again. I've tried having the streamer open before but it doesn't change anything.
If you have any idea, I would really appreciate it
Regards,
Étienne
Show LessHello
For each FX3 SDK below, please tell us when the SDK will be released and the supported OS.
- (Released date)/(Supported OS)
SDK1.3.1-
SDK1.3.2-
SDK 1.3.3-
SDK1.3.4-
Best Regards
Show LessHi cypress experts,
This is a question about high resolution (4208x3120@1fps, 3840x2160@2fps) in high-speed mode.
It works at lower resolution, only high resolution will get "CB failure".
And it can work at super-speed with all resolutions, same conditions and even higher frame rate.
I think the bit rate of my setting is within the usb2.0 limit, my image format is UYVY and using a ISP with CX3.
I have tried to increase dma buffer to maximum(size: 0xDCC0, count: 2), but it still got "CB failure" issue.
Because of my application need bigger code area, the 2-stage boot area 32KB is giving to code area.
Thus, do you have any suggestion for this question?
Thanks your time and looking for your feedback.
Show LessDear Sir,
Could you please help provide cyusb3065 Hardware reference design file.Thanks!
Hello,
I am looking if anyone knows of or has an existing recipe for libcyusb.so for yocto project. The shared library is needed on the embedded device to connect to another device using the fx2 and fx3 cypress chips and control the devices functions.
As it is now it the makefiles and install scripts will not work.
Thankyou in advance for the help.
Show LessI have modified my UVC single channel DMA application to make use of MultiChannel DMA to allow higher video throughput and avoid having to wait for the DMA buffers to empty. I followed the example from the AN75779 and can get video out but I am seeing a striping in the video output. I have included a photo of what I am seeing. What could be causing this? I am sending 1080p30 which has no issues when sending on a single channel DMA.
Because there are 2 images, that makes me thing the buffers are being sent out of order but I am unsure how that is possible if the FX3 enforces that each buffer must be filled and sent in-turn. I am using a reduced Slave FIFO GPIF project. I cannot do the active socket tracking in the GPIF state machine because it must also handle UAC audio being sent on a third socket so I instead track in firmware. I am using sockets 0 and 1 for video and have the FW tracking start with socket 0 (matching DMA config's prodSckId[0]) and after every CyU3PDmaMultiChannelCommitBuffer call I alternate between socket 1 or 0 depending on which one is the current socket.
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