USB superspeed peripherals Forum Discussions

I'm working with a custom camera frontend that does not follow MIPI-DPHY spec exacty on the clock lane.

The clock lane of this camera does not have HS-ZERO in its LP-HS transition.

The clock is continuous clock mode: LP-HS transition only happen once, clock does not switch back to LP between lines or frames.

Questions:

1) Can CX3 recognize this non-standard clock lane? (NXP IMX6Q SoC can recognize it)

2) How do I check the status of clock lane? (How do I know whether the clock is recognized by CX3 or not?)

    Currently I can get the camera frontend to transimit MIPI data, but I don't get the DMA callback on the CX3 side. I don't get any MIPI errors from CyU3PMipicsiGetErrors(). I'm suspecting the clock lane is not recognized by CX3. I want to confirm this. Is there a register that reports this?

3) It it possible to always run the clock lane always in HS mode?

    For NXP IMX6Q SoC, I must reset the MIPI DPHY when the clock lane is LP, then do LP-HS transition, then the SoC will recognize MIPI clock. If I reset MIPI DPHY with the clock already in HS mode, then it won't see the clock at all.

    Is it also the case for CX3?

Hello,

Image sensor is interfaced with fx2lp in slavefifo mode.image sensor configuration is 60 frames per second with 752x480 resolution.

we are modified cypress control center in order to display image.what is the frame rate that fx2lp can handle?

regadrs,

geetha.

Hello

1.when host(PC) is connected through  USB3.0 A to FX3 the host is showing "unknown device".How to rectify this problem.

2.The 3rd pin of USB3.0 A connector is showing 3.3V in addition to 5V in 1st pin after FPGA is programmed and signals and clock are given to FX3.Why is it so?.

/* Configure the video streaming endpoint. */

    endPointConfig.enable   = 1;

    endPointConfig.epType   = CY_U3P_USB_EP_BULK;

    endPointConfig.pcktSize = CY_FX_EP_BULK_VIDEO_PKT_SIZE;

    endPointConfig.isoPkts  = 1;

    endPointConfig.burstLen = 16;

    endPointConfig.streams  = 0;

    apiRetStatus = CyU3PSetEpConfig (CY_FX_EP_BULK_VIDEO, &endPointConfig);

/* Endpoint definition for UVC application */

#define CY_FX_EP_IN_TYPE                0x80    /* USB IN end points have MSB set */

#define CY_FX_EP_BULK_VIDEO             (CY_FX_EP_VIDEO_CONS_SOCKET | CY_FX_EP_IN_TYPE)         /* EP 3 IN */

#define CY_FX_EP_CONTROL_STATUS         (CY_FX_EP_CONTROL_STATUS_SOCKET | CY_FX_EP_IN_TYPE)     /* EP 2 IN */

I think the CY_FX_EP_BULK_VIDEO  is shoud set to out point ,why it is set to IN?

It should like this #define CY_FX_EP_BULK_VIDEO             (CY_FX_EP_VIDEO_CONS_SOCKET )         /* EP 3 OUT*/

Hello!

I have example UVC+CDC.

Many Thanks. Is very good example.

Yes, video is exist.

But, I looked, that for the case USB2 in descriptors file there is no description of CDC.

I myself added these CDC descriptors for my USB2  (file). In my added project files (descr2.h in added arcive)

the device became defined as a composite in UVC and CDC devices.

And even works.

But it working not stable.

Not full functionality is manifested, mainly in the following.

On some computers on the "upward" channel uart not communication - from uart to the virtual com-port.

On some computers in the case of usb2, on some computers in the case of usb3.

In the opposite direction, from virtual com port to the uart communication is good.

I try any drivers.

I do not even know what to correct. Look here please.