USB superspeed peripherals Forum Discussions
Hi, everyone
I am using the FX3 to stream video from a image sensor which is controlled by ISP.
The way of ISP control camera,it can showed video in moniter.
By using FX3 EVK CYUSB3KIT-003,the whole video screen is all blank in AMCAP and FX3 show as a camera device in th Device Management. The ISP output data format is 720p@30fps ,YUV 4:2:2. The ISP used GPIF II connected FX3,which used 8bit databus.
Base on AN75775 demo code(http://www.cypress.com/documentation/application-notes/an75779-how-implement-image-sensor-interface-using-ez-usb-fx3-usb), I mark the function about i2c.
When the screen is blank, the uart debug "UVC: Completed 59683 frames and 0 buffers" ,the value of frames is increase , but the buffer count of CyU3PDmaMultiChannelGetBuffer in CyFxUvcApplnDmaCallback function sometime is 0 and sometime is 7652,and the return of CyU3PDmaMultiChannelGetBuffer sometime is 69(CY_U3P_ERROR_ALREADY_PARTITIONED ),what's the problem and how I can solve it?
Something about the GPIF II ,FV is low valid,LV is high valid,so I seted the Polarity of FV is "active low" which is deffernt with the AN75779,and the state machine is changed which red cycle below.
.and then in
Show Less
I have an OV2775 Sensor with 1928x1088 RAW12 30 fps Configuration. According to the script the Horizontal Blanking is 1622px and Vertical Blanking 38 px, PCLK 75MHz The MIPI CLK Period is 125 Mhz, THS Prepare 48ns and THS Zero 69 ns. I am using this configuration in the CX3:
CY_U3P_CSI_DF_RAW12, /* CyU3PMipicsiDataFormat_t dataFormat */
4, /* uint8_t numDataLanes */
2, /* uint8_t pllPrd */
95, /* uint16_t pllFbd */
CY_U3P_CSI_PLL_FRS_500_1000M, /* CyU3PMipicsiPllClkFrs_t pllFrs */
CY_U3P_CSI_PLL_CLK_DIV_8, /* CyU3PMipicsiPllClkDiv_t csiRxClkDiv */
CY_U3P_CSI_PLL_CLK_DIV_8, /* CyU3PMipicsiPllClkDiv_t parClkDiv */
0, /* uint16_t mClkCtl */
CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t mClkRefDiv */
1928, /* uint16_t hResolution */
150 /* uint16_t fifoDelay */
I have tried to change the parameters and this is the best result I have got so far. However I still get two big vertical strips in top of my image when I stream it:
Any help will be largely appreciated thank you!
Show LessFX3 / AR0134 Image Sensor – Not working ( Black Screen).
Design is based on App note: AN75779
How to Implement an Image Sensor Interface Using EZ-USB FX3 in a USB Video Class (UVC) Framework
· Using the Cypress (CYUSB3KIT-003 EZ-USB® FX3™ SuperSpeed Explorer Kit)
· Using the extension board (CYUSB3ACC-004) with a custom adaptor board with a AR0134 Image Sensor.
Hardware checklist:
- Proper voltages getting to Custom sensor board adaptor.
- All Clock's look fine.
Software checklist:
- I added code to decode correct Hardware Device ID and turn on LED.
– Inside debugger I made sure it is getting to next step past (SensorI2cBusTest).
- I2C address and registers have been changed and confirmed with logic analyzer. - (I even do a bus decode to confirm).
- Added a test pattern – to know what would be sent out.
Other tests checklist:
- Probing the address bus – I see the data line change per the ( test pattern I’m sending).
- Reading Section 8 of AN75779 – (Troubleshooting)
Added debug switch in the uvc.h file (DEBUG_PRINT_FRAME_COUNT)
Response: UVC: Completed 0 frames and 0 buffers
Counter is at zero and never changes:
Note from app note: If you do not see the incremental frame counter in the PC terminal program, there is probably a problem with the interface between FX3 and the image sensor (GPIF or sensor control/initialization).
Note:
I'm still using the same file (cyfxgpif2config.h) generated from the GPIF editor - from AN75779.
It enumerates correctly and shows up as the correct device FX3 - Using VirtualDub or other camer programs I just a black screen.
Question:
Does this mean I need to make changes in State machine, and I have a timing issue?
I'm not sure how to make the changes needed in GPIF editor -- I have Sensor Spec , but it is under NDA.
Show LessDear Sir/Madam,
We developed one hardware using CX3. We have a Denebola RDK to test our source code. We have one source code which successfully generating PWM signal on Denebola RDK. But same code not working on our designed Hardware. We already did following test cases.
1) Power supply testing on each point are correct.
2) Source code programmed properly on our hardware.
3) Both oscillator connected and working properly
- 13.768 KHz
- 19.2 MHz
NOTE : Hardware schematic are as per the Denebola RDK.
Please let me know how to resolved this problem.
Thanks,
Amit
Show LessHi,
I'm using MAX2084 Evaluation kit, in that kit cyusb2014-bzx driver IC present when power on the board as per the EVM kit instruction. the system not detect. our system windows 7 professional 64 bit.
Show LessHello,
I am using sample code of PWM generation which is provided by Cypress SDK (GpioComplexApp). We are trying to generate same waveform on different GPIO like GPIO 19, 17, 18 but its not able to generate. I go through data-sheet but did not found anything on PWM pin. So, is their any restriction to set the GPIO as a complex pin.
Please let me know why this GPIO pins not able to configure.
Thanks,
Amit
Show LessWhat are the constraints on FX3’s GPIO clocks. There appear to be system constraints when the maximum 100MHz is selected for GPIO on FX3. At what frequency do the constraints start?
I'm posting this question for a customer to see if there's an easy fix before I dig into the issue. I've found similar issues with GPIO clocks on PSoC 6; but not sure how close the PSoC 6 core is to FX3 or HX3.
G
Show LessI have problems with firmware download from a host processor to FX3 through the 16-bit synchronous ADMux interface. I use Document No. 001-76405 Rev. * I.
You updated Appendix B: Troubleshooting Steps for Sync ADMux Boot in the document No. 001-76405 Rev. * I
In which you specify to write 256 bytes of data (B.3.1.d). Is not this a mistake? In Document No. 001-76405 Rev. * H - was 512 bytes.
Also, when recording 256 bytes of data (B.3.1), I do not get bit 2 (Socket 2 Available) of the PP_SOCK_STAT_L register (0x9E) is set (B.3.2.a). When recording 512 bytes bit 2 == 1 (ok).
According to B.3.2.d, read the PP_DMA_SIZE register (0x8F) and verify that the value is 0x0100. I am reading PP_DMA_SIZE == 0x0200.
I see Appendix B: Troubleshooting Steps for Sync ADMux Boot differs from Section 9.1.7 Firmware Download Example (Document No. 001-76405 Rev. * I).
Which of them is the right one to download the firmware in FX3 via the synchronous ADMux interface?
I performed the firmware download from a host processor to FX3 via the 16-bit synchronous ADMux interface as specified in the Firmware Download Example 9.1.7. But my firmware did not work.
What should I do extra what is not specified in Document No. 001-76405 Rev. * I
Show LessBased on the below reply from Cypress==> The MUXSEL line is controlled through an output GPIO of FX3 to select the correct pair of USB SuperSpeed lines. The logic of selecting the correct pair of USB SuperSpeed lines is implemented in FX3 firmware.
But I can't find FX3 Firmware to set up MUX Line for USB Type C Connector.
The DQ0~DQ31 set up for 32bit data transfer in my design.
Could you inform me What pin in FX3 can be used to detect MUXSEL Pin?
and where can I find the FX3 firmware Code for this related technical?
Thank you very much.
Show Less