USB superspeed peripherals Forum Discussions

Hi

I'm experiencing some unexpected behavior while changing the CX3 MIPI interface configuration. I had a hard time finding the correct settings to finally receive data form my camera board. I'm using an FPGA that emulates a CMOS camera with MIPI CSI2 TX and following specs:

- CSI2 D-PHY v1.1

- D-Phy clock 202.5 MHz

- 2 data lanes

- non-continuous clock mode

- Byte clock 50.6250 MHz

- Pixel clock 81.0 MHz

- Video format: RAW10

- Word count: 2400

- Resolution: 1920x1080

- H-blanking: 220

- V-Blanking: 181.7

- FPS: 30

With the following parameters in the CX3 configuration tools I got it partially working:

By partially working I mean that I succesfully receive about 75% of the frames (and they are also correctly displayed). But I still get some MIPI control errors (incorrect line state sequence according to the API). The debug terminal outputs following info:

Prod = 112 Cons = 112  Prtl_Sz = 23808 Frm_Cnt = 3885 Frm_Sz = 4147200 B
0 0 0 0 0 0 0 0 0
Prod = 112 Cons = 112  Prtl_Sz = 23808 Frm_Cnt = 3886 Frm_Sz = 4147200 B
0 0 0 0 0 0 0 0 0
Prod = 112 Cons = 112  Prtl_Sz = 23808 Frm_Cnt = 3887 Frm_Sz = 4147200 B
0 0 0 0 0 0 0 0 0
Prod = 0 Cons = 0  Prtl_Sz = 3840 Frm_Cnt = 3889 Frm_Sz = 3840 B
0 0 0 65 0 0 0 0 0
Prod = 0 Cons = 0  Prtl_Sz = 3840 Frm_Cnt = 3899 Frm_Sz = 3840 B
TimeDiff = 0 ms FPS = -1
0 0 0 87 0 0 0 0 0
Prod = 0 Cons = 0  Prtl_Sz = 3840 Frm_Cnt = 3909 Frm_Sz = 3840 B
0 0 0 43 0 0 0 0 0
Prod = 0 Cons = 0  Prtl_Sz = 3840 Frm_Cnt = 3915 Frm_Sz = 3840 B
0 0 0 66 0 0 0 0 0
Prod = 0 Cons = 0  Prtl_Sz = 3840 Frm_Cnt = 3927 Frm_Sz = 3840 B
0 0 0 55 0 0 0 0 0
Prod = 0 Cons = 0  Prtl_Sz = 19200 Frm_Cnt = 3931 Frm_Sz = 19200 B
TimeDiff = -1 ms FPS = 0
0 0 0 92 0 0 0 0 0
Prod = 0 Cons = 0  Prtl_Sz = 3840 Frm_Cnt = 3942 Frm_Sz = 3840 B
0 0 0 24 0 0 0 0 0
Prod = 112 Cons = 112  Prtl_Sz = 23808 Frm_Cnt = 3943 Frm_Sz = 4147200 B
0 0 0 0 0 0 0 0 0

As can be seen, at first it receives three frames without error (full size: 1920*1080*2=4147200B). But then it only receives two lines (3840B) and throws some errors. This happens a couple of times and then it receives again a full frame at the end.

Now what is really strange is that the behavior is very sensitive to the configuration parameters. For example when I increase the output pixel clock frequency, I receive more transmission errors and sometimes it doesn't even work at all. How can slightly inreasing the output pixel clock frequency have an effect on that? As long as the FIFO delay is not too short or too long (it is well within the margins suggested by the tool) it shouldn't have any effect in my understanding.

What is even more confusing is that it also happened that I noticed malfunction when changing the params in a way that the output pixel clock frequency was unchanged. E.g. decrease the predivider value and multiplier of unit clock both by a factor of two. In my understanding this should by no means have any effect on the behavior.

Dear 

I need EZ-USB GX3 Android driver

How i give this driver,thanks!

bill 

I'm using a CX3 chip, and I want to transfer 4K bufffers from the CX3 to the PC, in response to a command from the PC. I have opened up two bulk channels, one to receive, one to send, and have set up the dma channels...The dma channel's max buffer size is 1024.

On the CX3 send side, I can't figure out if I'm supposed to ask for one giant 4K-sized buffer in DmaChannelGetBuffer (and send 1 buffer), or if I need to ask for a 1024 buffer 4 times, and send 4 times. If I send 4 times, do I need the PC-side code to ask me for each buffer individually? Or do I just send 4 times? Basically, what I'm really asking is "how do I send large buffers across a 1024-max-sized DMA channel, who packages and unpackages the large buffers, and how do I set up the DMA channel parameters to allow this?" One of the things I don't understand is the dmabuffer's "status" flag. When to set the EOP and when not to set it. Another thing I don't understand (that is documented poorly) is DmaChannelConfig's "count" and "prodAvailCount", and the "burst mode" parameter provided in the descriptor structure. What if the burst mode is 1? What if it's 15?

On the PC side, I can't figure out how to do "big reads" so that if the CX3 on the send side, sent a big buffer, how to auto-collect those mini packets, reassemble them, and receive only 1 big one on the PC side. Is the DMA gather code in the PC's kernel supposed to do that for me, or do I have to write that code myself?

Hi

I want to use RAW 8bit data output by RAW 10bit image sensor.

I want to get low 8 bit data only for it.

How can i do it?

Hello,

Is there any requirement for the SS multiplexer control signal on the FX3S. I am going to use the GPIO_38(J1).

I have two uSDcards on VIO2 and 3 respectively, they need 3.3V, so GPIO is in VIO2, that would be ok, also in my routing.

Thanks in advance...

now I have a project, FPGA can write data to FX3(P to U), and I want to add a U to P channel based on this project. I suppose the PC can send data to the USB, and send it to the buffer of FX3，when the buffer is full，flagc will be pulled down and FPGA  will read the data from the buffer. In other word, it is a stream_out mode which is in the FX3 SDK , but i want it realize in my project(boss gives it me). According to the streamOUT source code, I choose the AUTO DMA mode and have added the state and flagc

and flagd pin  in the GPIF designer. I have configure the flagc as the dedicate thread 3  and flagd  water mark is 3. Endpoint and DMA channel configuration have be done But somehow when the buffer is full flagc is not be pulled down.I have attached my project.SrinathS_16​

I will use two fx3 usb to communication with my devices. When I use the friendlyname to get the usb name. I only get one usb name, and I only control the newest opened usb. how to control two fx3 usb simultaneously and respectively?

CCyUSBDevice*   m_pCyUSBDevice;
 
for (UCHAR i = 0; i < m_pCyUSBDevice->DeviceCount(); ++i){
 
        bool isOpen = m_pCyUSBDevice->Open(i);
        if (isOpen){
            QString friendly_name = m_pCyUSBDevice->FriendlyName;
 }
}

I implemented stream_in with CyAPI.lib. After calling WaitForXfer(), BulkInEndPtEndPt->LastError is equal to ERROR_IO_PENDING(997). I don't quite understand why this is.

TEST_METHOD(Test_StreamIn)
  {
   CCyUSBDevice  *USBDevice = new CCyUSBDevice(NULL);
   OVERLAPPED  inOvLap;
   inOvLap.hEvent = CreateEvent(NULL, false, false, L"CYUSB_IN");
   unsigned char inBuf[128];
   ZeroMemory(inBuf, 128);
   unsigned char buffer[128];
   LONG  length = 128;

   UCHAR  *inContext = USBDevice->BulkInEndPt->BeginDataXfer(inBuf, length, &inOvLap);
   USBDevice->BulkInEndPt->WaitForXfer(&inOvLap, 100);
   USBDevice->BulkInEndPt->FinishDataXfer(inBuf, length, &inOvLap, inContext);
   CloseHandle(inOvLap.hEvent);
  }

We have a FX3 application that needs 120Hz pulses with varying duty cycles. For example, from 11/12 duty and 6/12 duty as the plot shown below. We may have other varying duty pulse train requirement like, 90%, 75%, 50%, 25%, 10%.  Is it feasible for FX3?

Thank you in advance.