My code is based on AN75779 and I communicate with the Control EP with the "Cypress FX3 Example device 1" driver.
All new Windows 10 PC's that I have tested my mode with have a safety mechanism that prevent windows from installing the driver correctly because its not singed, and instead of it appearing in Universal Serial Bus controllers, it shows as Other devices and its not working properly.
The only thing I can do is to change the settings in the PC BIOS, enable windows test mode and only then the driver is installed correctly.
This procedure is fine for my tests but I can't expect my clients to do this procedure. Is their a way to overcome this issue with the driver signature? Or to communicate with the Control EP via the regular UVC driver?
All the best,
I have a basic setup working great with the FX3 when operating in synchronous master mode with internal clock settings. But, my data source always has the clock running from the start, so PCLK is always receiving a clock and data.
(Master/Slave) Either causes crash
The moment the GPIF bus is loaded, the processor freezes. Sometimes it gets as far as calling a `CYU3P_PIB_INTR_DLL_UPDATE` before freezing. It's always after load. I've tried springboarding into a loop of DATA_IN that doesn't actually write the data but nothing I do seems to prevent the device from freezing except discontinuing the clock.
Is there a way to suppress the PCLK pin until everything else is setup and ready to roll, like the state machine is started? Or anything else I can do to prevent the chip from seizing up when unsolicited data is flowing in?
BTW - as soon as I switch around to internal clock writing out, everything works 100% as expected.Show Less
你好，我们现在生成的板子采用uvc ov5640方案,但是我们在测试过程经常发现有的手机通过type-c线连接cx3时，经常无法检测到uvc设备，但是有的手机或者电脑支持比较好。最主要的一个现象是，同一台手机在某块板子上支持比较好，检测到uvc设备稳定，但是在另一块cx3板子（同一批次生产的板子）却经常检测不到uvc camera设备。给人的感觉就是同一批次的板子兼容性很差。请问题此问题，cx3我们需要如何从硬件或软件上优化或改善？Show Less
I've got problem with DMA watermark flag for write transfer. From the very beginning it is in it's initial state (active low and initial low), when as per my understanding it should go to low state after I fill buffer with some data. Could it be I have to adjust watermark value in my firmware? Below I attach screen from chip scope.
My FPGA is monitoring state of that flag and when it's changes it state to low allows to write few more words to Fx3 device (based on watermark value in my case watermark is 3)
I've double check my FPGA is monitoring right port (flag uses GPIO21 witch is CTL4 signal in Fx3, G25 in interconnection board).
state machine I use: SyncADMUx(16bit data bus 7bit address bus)
firmware: slave fifo (AN65974; with 2 isochronus endpoint)
I use xilinx FPGA (SP605), and cypress cyusb3-001 kit.
When my system reboots , it can't find FX3 in linux(I don't have this problem in windows).
I get "No device found", when I run cyusb_linux . (J4 is on). In linux, Fx3 needs to replug after reboot and then I can use it.
I attached the result of lsusb -t before repluging
This may have been placed in the wrong area but I am sure that will get figured out.
As the title says we are developing on a Cypress CX3 chip that we are viewing issues on that has been designed to be used as a camera board with 2 LED's. The board is set up with a USB-C connector. We are attempting to have a powered usb hub connect to the device and allow the host computer to trigger the hub to power up and stream images. However during a specific power up sequence the camera device will get locked into an unknown state and be unable to stream images. However we are able to see the device in the tree and still issue vendor commands.
How to reproduce the problem:
Using a powered hub we are able to 100% reproduce the issue by using the following steps ONLY with usb C to C cables. We cannot reproduce with C to A:
1. plug device into UNPOWERED USB hub w/ usb C to usb C cable
2. plug hub into UNPOWERED laptop w/ usb C to usb C cable
3. plug in power to usb hub
3. power on laptop
Data and information collected:
1. The device appears to get some sort of power to the CX3 chip on the order of 80mV and we have an LED attached to the device reset call that *appears to attempt to start a reset but does not complete*. This is an assumption. During normal operation we would have the laptop turned on. We would plug the device into the laptop and see a full white LED pulse and have the device do its reset.
2. Issuing a hard reset over I2C will reset the device and fix the issue. But we need to find out what is causing the issue and prevent it or understand why it is happening
3. Connecting UART into the device during the initial start up allows me to see the following dma errors:
4. Attempting to manually initialize the device through the API calls for the mipi and device initialization via a vendor command does not fix the issue.
5. Placing delays in the startup of the code does not prevent the initial startup from happening during power up of the hub
Any help or insight into how we could potentially get closer to our solution would be very appreciated. Thank you for your time and please let me know if I can provide any additional information to provide a more clear description of our issue.
这个FX3固件是把FX3的SPI flash中的bit文件下载到lattice FPGA运行，FX3 GPIF口是被配置成FPGA的slave fifo的，同时FX3在上位机上被枚举成一个UVC标准设备，怎样将它改到Xilinx zynq开发板上运行，并且FPGA的bit文件不用放在FX3的SPI器件中，直接存放在FPGA开发板上？谢谢Show Less
We are developing with FX3.
I am planning to use two MIPI sensor modules in my application (2 MIPI lanes per module). What would be the best way to connect both of them to a single CX3 controller?
I'd like to make a non-uvc project.
I referred to the below link then make a project successfully.
However, I cannot build it with many errors even though I didn't add my own source yet.
I attached my project.
Please let me know what's the problem.